EE345 Chapter 2 Lecture 3 April 11. 2.2 Instruction and addressing modes 1.Extended Addressing 2.Direct Addressing 3.Inherent Addressing 4.Immediate Addressing.

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Presentation transcript:

EE345 Chapter 2 Lecture 3 April 11

2.2 Instruction and addressing modes 1.Extended Addressing 2.Direct Addressing 3.Inherent Addressing 4.Immediate Addressing 5.Indexed Addressing 6.Relative Addressing (66)

1. Extended Addressing Extended addressing means that the complete 16-it address of the data is the instruction code. LDAA $1020 (double bytes) op hh ll (66)

1. Extended Addressing (67) B6 C C23A C23B C133 C239 Figure 2-20 Memory format of extended addressed instructions. The example is LDAA instruction. Address of data Op code High byte Low byte Data

2. Direct Addressing If the data is in the address between $0000 to $00FF, the high byte 00 is then ignored (by default). Only op code and low byte of address in the instruction is direct addressing. LDAA $0024  LDAA $24 op hh ll op ll (68)

2. Direct Addressing (68) B BB B7 00 C200 C202 C206 C201 LDAA EXT 12 3F ADDA EXT Figure 2-22 Modified program with data numbers at new locations. STAA EXT STOP C203 C205 C204 C207 C209 C FF 29 SUM N2 N B F C200 C202 C206 C201 LDAA DIR ADDA DIR Figure 2-23 Program using direct addressed instructions. STAA DIR STOP C203 C205 C FF 29 SUM N2 N

3. Inherent Addressing Instruction requires only an opcode but no operand is inherent addressing. ABA It adds B accumulator to A accumulator and puts result into the A accumulator. (70)

3. Inherent Addressing (71) B6 C3 45 D6 10 1B B7 C3 C200 C202 C206 C201 N1 46 3F 29 FF LDAB DIR Figure 2-26 Program with inherent addressed instruction STAA EXT STOP N2 SUM C203 C205 C204 C207 C209 C208 C345 C ABA 0010 LDAA EXT

Double-byte Data Double-byte numbers in the Motorola 68HC11 are always stored in two consecutive memory registers with the high byte of the number at the lower address and the low byte at the higher address. (71)

A double-byte register The programming model includes the double-byte register called inex register X. The instruction register will no longer be shown in the figures because its operation should now be apparent. The index register will be used to demonstrate addressing of double-byte numbers. (72)

Immediate addressing A constant can be put inside the instruction code. The addressing mode that places a constant data number inside the instruction is called immediate addressing. Immediate addressed instructions do not contain an address. (73)

Load x-index register (73) FE C2 34 N Figure 2-28 Extended addressed instruction with double-byte data. C234 C235 LDX 5678 X

(73) Figure 2-29 Memory format of immediate addressed instructions that have single-byte data numbers Op code Data

(74) Figure 2-30 Memory format of immediate addressed instructions that have double-byte data numbers CE 12 Op code High byte of data 34 Low byte of data

Indexed Addressing A C201 B7 Figure STOP C200 C202 C C200 X (75) Op code Data Note: We will cover in detail in next two chapters LDAA 0,X

Indexed Addressing A C201 B7 Figure 2-32 Memory format of indexed addressed instructions. The example is a Load Accumulator A Instruction. STOP C200 C202 C C200 X (76) Op code Data Real address: base address + offset = C = C202 LDAA 2,X

Relative Addressing Use base address and offset instead of real address. Examples are branch instructions: beq, bne. Skip relative addressing this chapter. Cover in detail in chapter 3, when we learn to write assemble code.

2.3 Addressing Mode Summary Inherent addressing – the instruction code has only an op code without an operand such as an address. The instruction operates only on microprocessor registers. Immediate addressing – the instruction code is an op code and a constant data number. The data number is a single- or double-byte number as needed. The data value should be used only by the immediate instruction.

Direct addressing – instruction code is an op code and low byte of the address of the data. Extended addressing – the instruction code is an op code and a double-byte address that can access the whole memory from address 0000 through FFFF.

Indexed addressing - instruction code ins an op code and a single-byte unsigned offset. Relative addressing – the instruction code is an op code and a single- byte signed relative offset. The offset is added to the program counter to alter it if the instruction.