Networked Embedded Systems Sachin Katti & Pengyu Zhang EE107 Spring 2016 Lecture 13 Interfacing with the Analog World

2 Outline Sampling ADC DAC

3 Going from analog to digital What we want How we have to get there SoftwareSensorADC Physical Phenomena Voltage or Current ADC Counts Engineering Units Physical Phenomena Engineering Units

4 Choosing the granularity Resolution – Number of discrete values that represent a range of analog values – MSP430: 12-bit ADC 4096 values Range / 4096 = Step Larger range  less info / bit Quantization Error – How far off discrete value is from actual – ½ LSB  Range / 8192 Larger range  larger error

Oversampling One interesting trick is that you can use oversampling to help reduce the impact of quantization error. – Let’s look at an example of oversampling plus dithering to get a 1-bit converter to do a much better job… 5

Oversampling a 1-bit ADC w/ noise & dithering (cont) CountVoltage 500 mV 0 mV 375 mV N 1 = 11 N 0 = 32 uniformly distributed random noise ±250 mV “upper edge” of the box V thresh = 500 mV V rand = 500 mV Note: N 1 is the # of ADC counts that = 1 over the sampling window N 0 is the # of ADC counts that = 0 over the sampling window

Oversampling a 1-bit ADC w/ noise & dithering (cont) How to get more than 1-bit out of a 1-bit ADC? Add some noise to the input Do some math with the output Example – 1-bit ADC with 500 mV threshold – Vin = 375 mV  ADC count = 0 – Add ±250 mV uniformly distributed random noise to Vin – Now, roughly 25% of samples (N 1 ) ≥ 500 mV  ADC count = 1 75% of samples (N 0 ) < 500 mV  ADC count = 0 7

8 Can use dithering to deal with quantization Dithering – Quantization errors can result in large-scale patterns that don’t accurately describe the analog signal – Oversample and dither – Introduce random (white) noise to randomize the quantization error. Direct Samples Dithered Samples

9 Flash ADC Vin connected with 2N comparators in parallel Comparators connected to resistor string

10 Selection of ADC The parameters used in selecting an ADC are very similar to those considered for a DAC selection Error/Accuracy: Quantizing error represents the difference between an actual analog value and its digital representation. Ideally, the quantizing error should not be greater than ± 1⁄2 LSB. Resolution: DV to cause 1 bit change in output Output Voltage Range -> Input Voltage Range Output Settling Time -> Conversion Time Output Coding (usually binary)

11 Digital to Analog Converters (DACs) Voltages V 1 to V n are either V ref if a bit is high or ground if a bit is low V 1 is most significant bit V n is least significant bit

12 Digital to Analog Converters (DACs) Voltages V 1 to V n are either V ref if a bit is high or ground if a bit is low V 1 is most significant bit V n is least significant bit Advantages: Simple Construction/Analysis; Fast Conversion Disadvantages: Requires large range of resistors (2000:1 for 12-bit DAC) with necessary high precision for low resistors; Requires low switch resistances in transistors

13 R-2R Ladder The less significant the bit, the more resistors the signal muss pass through before reaching the op-amp The current is divided by a factor of 2 at each node

14 R-2R Ladder The current is divided by a factor of 2 at each node Analysis for current shown below

15 Resolution