Low Voltage Power Supplies: towards design specifications Henryk Palka, IFJ PAN Krakow (for WP 1.7.2 team: Krakow, Prague, KEK) DEPFET-Belle Meeting Karlsruhe,

Slides:



Advertisements
Similar presentations
Sezione di Bari September 16, 2002D. Elia - DCS workshop / ALICE week 1 SPD PS system and Controls Domenico Elia, INFN-Bari.
Advertisements

Technical Board, 12 July 2005Børge Svane Nielsen, NBI1 Status of the FMD Børge Svane Nielsen Niels Bohr Institute.
PIXEL WEEK September 1999 S. Kersten University of Wuppertal 1 Status of Interlock Box New Interlock Box: NTC -I Box q relative changes in resistor values.
CMS WeekDec 2002E. Hazen HF Electronics Status Report E. Hazen, J. Rohlf, E. Machado Boston University.
RPC Electronics Overall system diagram –At detector –Inside racks Current status –Discriminator board –TDC board –Remaining task.
1 Integration of the HV Distribution System to the First TRD Super Module P. Mantzaridis, A. Markouizos, P. Mitseas, A. Petridis, S. Potirakis, M. Tsilis,
DP Cabinet.
Status of LAV FEE electronics G. Corradi, C. Paglia, D. Tagnani & M. Raggi, T. Spadaro, P. Valente.
Infrastructure for LHCb Upgrade workshop – MUON detector Infrastructure for LHCB Upgrade workshop: MUON power, electronics, cable Muon upgrade in a nutshell.
F. Arteche, C. Esteban Instituto Tecnológico de Aragón D. Moya, I. Vila, A. L. Virto, A. Ruiz Instituto de Física de Cantabria Powering requirements and.
Electronics for PS and LHC transformers Grzegorz Kasprowicz Supervisor: David Belohrad AB-BDI-PI Technical student report.
1 Low Voltage Power Supplies for ALICE TB L.Jirden u Recall: u target devices & possible solutions u Outstanding actions.
Towards a Detector Control System for the ATLAS Pixeldetector Susanne Kersten, University of Wuppertal Pixel2002, Carmel September 2002 Overview of the.
DCS planning for ITS/SDD Vojtech Petracek Jiri Kral CTU Prague DCS workshop CERN.
Technical Training. 1 Configuration: 2558 Analog Input Module 1. Select voltage or current input mode for each channel 3. Select digital filtering, offset.
Saverio Minutoli INFN Genova 1 1 T1 Electronic status Electronics Cards involved: Anode Front End Card Cathode Front End Card Read-Out Control card VFAT.
ALICE DCS Workshop 28/29 May 2001 Vito Manzari, INFN Bari SSD (Silicon Strip Detector) SDD (Silicon Drift Detector) SPD (Silicon Pixel Detector) Detector.
1 Low Voltage Power Supplies for ALICE ALICE week June 04 L.Jirden u Detector requirements u Target Devices u Procurement u Actions.
GLAST LAT ProjectDelta PDR/Baseline Review July 29-August 1, 2002 Section 7.3 AntiCoincidnce Detector Technical Status 1 GLAST Large Area Telescope: AntiCoincidence.
1 Low Voltage Power Supply Specification DCS Workshop 8 Sept 03 L.Jirden.
V. Cindro, Jožef Stefan Institute, Ljubljana, Slovenia DAQ, DCS, Power Supply and Cables Review CERN, March Electrical PP1 Basic features Electrical.
Bagby, Foglesong General Silicon Meeting Run IIb LVPS Status  Design Goals  Key Issues  System Diagrams  Prototype – 1%  Plans.
High Voltage System outside Drawers Tilecal upgrade meeting at Stockholm (3-5 June 2013) François Vazeille on behalf of Roméo Bonnefoy, Christian Fayard,
V.Shutov Dec.2014 Present Design Status Of Multichannel Power Supply For AHCAL SiPMs.
Power Distribution Existing Systems Power in the trackers Power in the calorimeters Need for changes.
HallA/SBS – Front Tracker PARAMETERDESIGN VALUE Microstrip Silicon Detector Number of tiles/plane and size2 Number of planes2 Size of the single
Oct 29, 2001 Ron Sidwell 1 Purple Card. Oct 29, 2001 Ron Sidwell 2 Purple Card Spec Two channels per printed circuit board Size ~20 sq. in. or best effort,
Status report on the development of a readout system based on the SALTRO-16 chip Leif Jönsson Lund University LCTPC Collaboration Meeting
HV-Splitter for RENO Project S. Stepanyan, 김우영 경북대학교 Y.Kim Sejong University May-2008.
Status of the Remote HV System 10 June 2015 TileCal week, upgrade session Roméo Bonnefoy, Romain Madar and François Vazeille ● Summary of performances.
UF –PNPI HV system status August 2008 Sergey Volkov Nikolai Bondar PNPI.
Acquisition Crate Design BI Technical Board 26 August 2011 Beam Loss Monitoring Section William Vigano’ 26 August
Update on final LAV front-end M. Raggi, T. Spadaro, P. Valente & G. Corradi, C. Paglia, D. Tagnani.
Towards a final design of LAV front-end M. Raggi, T. Spadaro, P. Valente & G. Corradi, C. Paglia, D. Tagnani.
1 LHCb CALO meeting Anatoli Konoplyannikov [ ITEP / LAPP ] Introduction Status bits of the LHCb readout supervisor ODIN HVSB board specification.
Beam Line BPM Filter Module Nathan Eddy May 31, 2005.
1 Low Voltage Power Supplies for ALICE TB L.Jirden u Target devices (reminder) u Market Survey and Tender u Actions.
7/28/2003DC/EC Review Aerogel Read out Electronics K. Ozawa, N. Kurihara, M. Inaba, H. Masui T. Sakaguchi, T. Matsumoto.
C. Kiesling, 1st Open Meeting of the SuperKEKB Collaboration, KEK, Dec , The DEPFET-Project: European Collaboration for a Pixel SuperBelle.
Sensor testing and validation plans for Phase-1 and Ultimate IPHC_HFT 06/15/ LG1.
Design of High Voltage System Kyungju Ma & Reno Collaboratiors
DOE/NSF Review of U.S. ATLAS May 21-23, 2003 CSC Mechanics and Electronics Paul O’Connor Tom Muller BNL May 22, 2003.
Connector Differential Receiver 8 Channels 65 MHz 12 bits ADC FPGA Receive/buffer ADC data Format triggered Events Generate L1 Primitives Receive timing.
Assumptions: Cockcroft-Walton photomultiplier bases are the same for all ECAL sections Digital to analog converters are installed on the distribution boards.
9/18/2003Safety Review Electronics Electronics design LV, HV power supply Fusing Heat.
12/17/01 Ron Sidwell 1 Run2b Datapath 17 Dec Update Bill Reay, Ron Sidwell, Noel Stanton, Russell Taylor, Kansas State University.
GAN: remote operation of accelerator diagnosis systems Matthias Werner, DESY MDI.
Sponsored By: Freescale Sponsor: Kevin Kemp Faculty Advisor: William Stapleton Project # 1.3.
PHENIX Safety Review Overview of the PHENIX Hadron Blind Detector Craig Woody BNL September 15, 2005.
Distributed Low Voltage Power Supply System for Front End Electronics of the TRT Detector in ATLAS Experiment E.Banaś a, P.Farthouat b, Z.Hajduk a, B.Kisielewski.
Current Status of RICH LVL-1 Trigger Module Takashi Matsumoto and Ken Oyama Presentation Outline Topics Geometry of Trigger Tile Required function of RICH.
DCS meeting - CERN June 17, 2002V.Kouchpil SDD DCS status Low Voltage system End-ladder ASIC High Voltage system Cooling system Schedule.
New digital readout of HFRAMDON neutron counters Proposal Version 2.
ACT20X Ex isolator/ amplifier. Page 2 ACT20X (Ex isolators family) Overview - Connects to process equipment in Class/Div, or Zone 0 - Zone 2 areas - ACT20X.
1 Test Beam with Hybrid 6 Florian Lütticke for the Testbeam Crew Bonn University 7th Belle II VXD Workshop and 18th International Workshop on DEPFET Detectors.
Design summary Status of the development & production - test run with S3a and S3b prototype - performance tests To do list for production & development.
H.-G. Moser Max-Planck-Institut für Physik 2nd DEPFET workshop 3-6 May 2009 Open Issues Readout cycle: 10 µs or 20 µs ? Advantages of 20 µs: - smaller.
Over voltage protection of the Power Supply System for the PXD detector. 4-6 February 2013 Wetzlar1 Bartlomiej Kisielewski, Piotr Kapusta INP PAN Krakow.
High Voltage modulators ESS developments Carlos A. Martins ESS Accelerator Division, RF electrical power systems.
The new SVD Power Supplies o General requirements o Power supplies structure o Tender process o Test system 2/10/2014SVD Power Supplies1 F.Forti, INFN.
Power Supply for DEPFET in SuperBelle Pablo Vazquez IGFAE-USC Henryk Palka INP-KRA.
Front End. Charge pre-amp and detector Voltage regulator. TOP side. Detector linear voltage regulator BOTTOM side. Charge pre-amp.
Solid State Amplifier Development at PSI
Calorimeter Mu2e Development electronics Front-end Review
Analog FE circuitry simulation
PXD Summary Tests PXD9 Pilot Production ASICs Components Plans:
W A T Supplying system test with external supplies
Meeting on Services and Power Supplies
Low Voltage Supply and Regulation
RPC Electronics Overall system diagram Current status At detector
Presentation transcript:

Low Voltage Power Supplies: towards design specifications Henryk Palka, IFJ PAN Krakow (for WP team: Krakow, Prague, KEK) DEPFET-Belle Meeting Karlsruhe, Dec 2nd, 2008  General considerations  Voltages list and design parameters  Mechanical form-factor  Planning

WP 1.7.2: LV PS (Krakow, Prague, KEK), Karlsruhe DEPFET-Belle meeting Dec 2nd, 2008 H. Palka 2 Low Voltage Power Supplies (LVPS)   LVPS module: analog and digital voltages, controllers, regulators, optocouplers   LVPS unit(‘card’) = n LVPS modules(channels) the best if ‘n’ matches multiples of #DCD’s/half-ladder R bp =15mm, variable pitch version, ladders 10/12 L1/L2 L1 L2 F B F B Det.modules/0.5L #DCD/0.5L if 4 LVPS ch./card: 2*(10+12)=44 LVPS cards (156 channels) (3-4 crates)   LVPS card: 4 LVPS modules, AC/DC generator, master card controller, temperature sensor, interlock circuit, hot-swap? General considerations: or ‘mono-voltage’ cards + power distributor close to the detector? (cable duct space)

WP 1.7.2: LV PS (Krakow, Prague, KEK), Karlsruhe DEPFET-Belle meeting Dec 2nd, 2008 H. Palka 3 Low Voltage Power Supplies (LVPS) -workout voltages list and design parameters: Voltage name Chip nameNominal voltage [V], accuracy or range Nominal/Maximum current [mA] Analog V A x DCD xx  xx xx Analog V A x Switcher xx  xx xx ……. Digital V D x DCD xx  xx xx Digital V D x Switcher xx  xx xx ……. VCSEL Control Voltage xx-yyxx ……. RESETHIGH/LOW Negative logic xx SELECTHIGH/LOWxx Current source 0thermistorxx Current source 1thermistorxx + output specs: noise level&frequency, ripple level,trip,ramp…

WP 1.7.2: LV PS (Krakow, Prague, KEK), Karlsruhe DEPFET-Belle meeting Dec 2nd, 2008 H. Palka 4 Low Voltage Power Supplies (LVPS)   6U (?) card in 19” Euro crate  front panel LEDs: x4 + status (interlock/trip)  backplane: decide connectors/cables Mechanical form-factor: Voltage NameAnalog V A Digital V D … Remote sensing controlYes MonitoringV/I Setting/Monitoring resolution1% Power Return LineAGNDDGND Remote controls & return lines:

WP 1.7.2: LV PS (Krakow, Prague, KEK), Karlsruhe DEPFET-Belle meeting Dec 2nd, 2008 H. Palka 5 Low Voltage Power Supplies (LVPS)  workout a detailed list of components  elaborate a technical specifications document  estimate costs  prototype procurement  select the manufacterer Planning informal contact established with Fideltronik, the producer of HVPS for ATLAS of HVPS for ATLAS Short term  agree on design parameters  find/select a designer Long term

WP 1.7.2: LV PS (Krakow, Prague, KEK), Karlsruhe DEPFET-Belle meeting Dec 2nd, 2008 H. Palka 6