Robust Low Power VLSI R obust L ow P ower VLSI CORDIC Implementation for a battery-less Body sensor Node L. Patricia Gonzalez G. Dept. of Electrical Engineering,

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Robust Low Power VLSI R obust L ow P ower VLSI CORDIC Implementation for a battery-less Body sensor Node L. Patricia Gonzalez G. Dept. of Electrical Engineering, University of Virginia January 20, 2015

Robust Low Power VLSI Body Sensor Nodes: A Power Challenge om/us/mobile/wearabl e-tech Battery Life (days) …

Robust Low Power VLSI Outline  Our BSN Challenges  CORDIC  CORDIC Modifications  Data Path Re-use  Increment the Range of Convergence  Results 3

Robust Low Power VLSI Outline  The BSN Challenges  CORDIC  CORDIC Modifications  Data Path Re-use  Increment the Range of Convergence  Results 4

Robust Low Power VLSI The Ultra Low Power Challenge 5 Sensor Analog Front End Digital Logic TX RX ADC Power Management Microcontroller Control / Processing / Interfaces Zhang, et. al. UVA 2014[1] 20 μW 50 μW

Robust Low Power VLSI 1. Optimum Energy : Subthreshold 6 VDD [V] Energy per cycle [J] Eleakage Subthreshold Region

Robust Low Power VLSI 2. Saving Energy : Hardware Accelerators 7 MCU clock cycles CORDIC Applications QRS Detection Gait Speed Estimation Blood Pressure Accelerator clock cycles Coordinate Rotation Digital Computer

Robust Low Power VLSI Outline  The BSN Challenges  CORDIC  CORDIC Modifications  Data Path Re-use  Increment the Range of Convergence  Results 8

Robust Low Power VLSI 9 x y

Robust Low Power VLSI CORDIC: Shifter and Adders 10 Multiplexer >> Xreg +/- Multiplexer >> Yreg +/- Multiplexer Zreg +/-

Robust Low Power VLSI Our CORDIC implementation  Re-use the data path to calculate 11 functions.  Increment the convergence range. 11 Multiplexer >> Xreg +/- Multiplexer >> Yreg +/- Multiplexer Zreg +/-

Robust Low Power VLSI Outline  The BSN Challenges  CORDIC  CORDIC Modifications  Data Path Re-use  Increment the Range of Convergence  Results 12

Robust Low Power VLSI Data Path Re-use 13 y y x Walther, A Unified algorithm for elementary functions

Robust Low Power VLSI Outline  The BSN Challenges  CORDIC  CORDIC Modifications  Data Path Re-use  Increment the Range of Convergence  Results 14

Robust Low Power VLSI Increase the range of convergence  Extra iterations.  Adjust the binary point 15 OperationConventional CORDIC Proposed Enhancements 1,2,3,…,n-3,-2,-1,1,2,3,…,n Xiaobo Hu, 1991

Robust Low Power VLSI Accuracy vs. Range Tradeoff 16

Robust Low Power VLSI Outline  The BSN Challenges  CORDIC  CORDIC Modifications  Data Path Re-use  Increment the Range of Convergence  Results 17

Robust Low Power VLSI 18 Multiplexer >> Xreg +/- Multiplexer >> Yreg +/- Multiplexer Zreg +/- New Hardware Conventional Data path ROM for Multiplexer >> Multiplexer i i i i Function Decoder From BSN

Robust Low Power VLSI Body Sensor Node 19 Klinefelter, A et. al [2]

Robust Low Power VLSI Minimum Energy Point - Results 20 Frequency : 8KHz – 7.18 MHz Energy per 0.5V – 348KHz : 1.1pJ

Robust Low Power VLSI Comparison Table 21 CORDIC [3] This Work Error Superior limit for the Convergence range 20 Cosine

Robust Low Power VLSI E per Cycle (Epc) VDD Subthreshold 22 Applications QRS Detection Gait Speed Estimation Blood Pressure Accelerators MCUAccelerator 3000 clock cycles clock cycles Sensor Analog Front End Digital Logic TX RX ADC BSN Zhang, et. al. UVA 2014[1] Low Power Challenge!

Robust Low Power VLSI R obust L ow P ower VLSI Thanks

Robust Low Power VLSI Unified Algorithm for elementary functions 24 Walther, A Unified algorithm for elementary functions -

Robust Low Power VLSI ECG Algorithm Example 25 Low Pass Filter Arc Length Transform Adaptive Threshold & Local Search W. Zong, 2003, A robust open source algorithm to detect onset duration of QRS complexes.

Robust Low Power VLSI Table for CORDIC Functions 26 J. Kwong, 2010, Low Voltage Embedded biomedical processor. Thesis