1 Vertex Detection at the Muon Collider Ronald Lipton, Fermilab Muon Collider Workshop, Nov 11 2009 Vertex detector design concepts are fairly well advanced.

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Presentation transcript:

1 Vertex Detection at the Muon Collider Ronald Lipton, Fermilab Muon Collider Workshop, Nov Vertex detector design concepts are fairly well advanced for the ILC (although we don’t really know how to execute the designs). Detailed studies by LCFI and others on B tagging We can use these designs as a basis for Muon collider studies Compare the machine environments – how must the designs change? How do the changes affect the physics?

Ronald Lipton Vertex LC Vertex Physics Needs Lepton Collider is designed to do precision physics Higgs couplings –Require excellent separation of b/c/light quark vertices Higgs self coupling: –B quark ID within jets Forward-backward asymmetry ?? –Flavor tagging –Vertex charge –Forward tracking c c (b bkgr) b (Hillert) KK graviton exchange with jet-charge info  s = 500 GeV,  = 1.5 TeV, 500 fb -1 (Hewett) Polarized beam, B, Bbar separation

3 Physics Characteristics Machine design luminosity L ~ cm -2 s -1 (√s = 2 TeV) –Cross sections are small –Hadronic event rate low Need to preserve signal Need excellent particle identification –Discriminate W and Z in hadronic decay mode –Distinguish quarks from antiquarks Events/500 fb ZH →  H ~3700 evts/500 fb - 1  (fb) (Demarteau)

4 ILC Vertex Detector Goals vs  collider Basic goals are extrapolated from the SLD CCD vertex detector.  collider comments in red Excellent spacepoint precision ( < 5 microns ) ✓ Superb impact parameter resolution ( 5µm  10µm/(p sin 3/2  ) ) ?? –Increased mass and larger inner radius will degrade resolution Transparency ( ~0.1% X 0 per layer ) –Mass associated with liquid cooling –Power density –Guess ~ 0.4% Integration over <150 bunch crossings (45  sec) ✓ –Closer to 10  s for  collider Moderately radiation hard –Significant radiation hardness Stand-alone pattern recognition (SiD)

Backgrounds Background considerations will likely dominate the design at the muon collider –Instantaneous backgrounds associated with beam crossing that increase occupancy –Radiation levels near the vertex detector that will generate radiation damage and dictate operating temperature and mechanical design Will force compromises with respect to ILC designs and eliminate some technologies 5

Backgrounds II Muon collider has a different radial distribution than a electron collider –More neutrons –Less disrupted beam –Upstream backgrounds –More complex shielding Particle composition is different: need to calculate effective radiation damage factor vs radius for detailed folding of spectra Scale to non-ionizing energy loss Electrons cause much less displacement damage 6

Radiation Damage Dominated by neutrons 1200/cm 2 /xing at 5 cm at 2x2 TeV 1200 x 10 5 /sec x 3600sec/hr x 500 hr/yr ~ 2.6x10 14 /year –Significant, still less than SLHC –Assume 200 micron thick, V dep ~ 200 V –Vertex (and tracker) need to be cooled to around 0 deg C This is a simple calculation that assumes 1 MeV neutrons and does not include other species Nikoli’s latest – small nose calculation has higher fluences 7

LHC and  Coll 8 1 Mgy = 100 Mrad Need to scale all particle fluxes to NIEL damage, then compare to LHC Will likely want to stay away from peak (Mokhov)

Luminosity factor as a function of radius for processes requiring vertex charge for 2 jets (Hillert) Vertex detector Geometry Why do we worry so much about geometry Efficiency is important – the event rates are low Resolution really depends on inner radius and vertex detector mass –B-id efficiency and vertex charge ID depends strongly on resolution –Charm, B, and light quark separation for Higgs decay measurements Radiation levels determine cooling requirements –ILC detectors assume air cooling near RT –Heavily irradiated detectors will need to operate near -10 deg and may require liquid cooling – probably CO 2, which is more massive. 9

Performance Measures LCFI vertex charge ID performance measure for B decays in jet Stringent – a single missed track can ruin the measurement Inner layer radius increase not accompanied by outer radius increase Should “scale” with IP resolution 10 (A. Nomerotski LCFI)

SID MuColl Frankenstein Ronald Lipton Vertex deg cones Outer VTX layer ~ inner SiD Trk

12 Design Features ILC –Outer radius ~ 6 cm –Barrel length ~ 14 cm –Ladder widths 1-2 cm –Disks to cover forward region Muon Collider –Inner radius ~ 5 cm –Outer radius ~ cm Caveat – this is NOT a real design – just a sketch of how designs might evolve The nose does provide a convenient support and service routing region Could also serve as heat sink?  Collider SiD Vertex Barrel Vertex Disks 20 deg nose

IP Resolution Use track fit spreadsheet to estimate degradation of resolution –Based on SiD design –5 micron vertex and 12 micron track hit resolution –Radii of (1.5→6 cm) go to (5→20 cm) or (2→20 cm) –0.1% RL/layer → 0.4% At most x 2 worse Keeping constant r in /r out important Can trade radius for RL Ronald Lipton MCWS

14 Beam structure and Time Resolution ILC – 1 ms train every 0.2 sec ILC - No trigger - read all hits Muon collider short bunches every  s –1 event every 90 seconds at at 1.5 TeV –This will probably be a triggered system 10 6 less data flow Can an efficient trigger be formed –Long FE integration time → lower FE power –Low digital and data transmission power –Latency is probably modest (triggers would not be complex) Time is power (FE current, more clock cycles, power = f x  V x C …) 337 ns x s Analog Power on Analog Power off Digital readout 0.95 ms

15 Material To achieve ILC goals we must improve RL/layer over LHC by ~20 x For muon collider we need to deal with –Liquid cooling- Increased power –Increased data load?- Detector will be thinned to microns –Less mass and more rad hard ATLAS at LHC 3 layers (Maurice) 5 Layers

16 Noise and Power For pixel amplifier-based devices the FE amplifier usually dominates power consumption: Series white noise: Noise scales as C and 1/sqrt[transductance (g m )] Pixel front end transistors will operate in weak inversion - where g m is independent of device geometry and ~(I d /nV T ). Need < 200  W/mm 2 Acceptable low current operation (<1  A) requires long shaping and/or low node capacitance –For t s = 1000ns, I d =0.1  A C d ~ 100 ff noise ~ e –~10 ff should be achievable in SOI devices, in MAPS –FE power ~ 200  W/mm 2 with 20 micron pixels – but this does not count any other parts of the circuit – pretty hard to achieve air cooling.

17 Air Cooling Air cooling in ILC is needed to keep mass to a minimum (remember 0.1%) –implies a limit on power dissipation Estimate by requiring laminar flow through available apertures –This sets total mass flow – other quantities follow For SiD design –Use the outer support CF cylinder as manifold (15mm  r) –Maintain laminar flow (Re max = 1800). –Total disk (30W) + barrel (20W) power = 50W average For SiD ~ 131 µW/mm 2. Max  T ~ 8 deg (Cooper, SID)

18 Power Distribution Power goals in ILC are “met” using power pulsing –Duty factor ~1/200 assume 1/100 power savings –Peak and average power are both crucial issues for the vertex detector –Power pulsing for FE chips - just turn power on during 0.95/200 ms –Maximum duty factor ~200, assume ~100 may be practical 2000 W=> 20 W (average) –But I peak is still the same A if we saturate the 20W limit –High peak currents => more conductor to limit IR drop => Mass –Serial powering, DC-DC conversion can lower instantaneous current The  collider beam structure does not allow for power pulsing –Probably need liquid cooling –More than 0.1% RL mass

19 Sensor Design CCDs –Readout too slow CMOS Active Pixels –Possible, radiation hardness? SOI –Possible, radiation hardness? 3D –Yes DEPFET –Probably too slow 19 p+ n+ rear contact drainbulksource p s y m m e t r y a x i s n+ n internal gate top gateclear n - n+ p ~1µ m 50 µm CCD CMOS Active Pixels SOI 3D DEPFET ? ?

Sensors 20 th Century studies assumed 300  m square pixels ILC studies assume ~ 20  m square pixels x 225 less occupancy/pixel It is likely that these smaller pixelated devices will provide sufficient resolution for good pattern recognition. But other techniques can be used to reduce occupancy based on inter-layer correlations This technology is being developed for CMS upgrade Ronald Lipton MCWS  Col Track correlation module 2009 Track trigger module for CMS Phase II Based on 3D electronics

False hit rejection Random false hits can be rejected with minimal material and modest power penalty using 3D bonded monolithic active pixel ICs We could almost do this now Ronald Lipton MCWS Hit Correlation circuitry bond interface track

22 Conclusions A few initial comments: –Both vertex and tracker will need to be cooled below 0 deg C –Vertex detector inner and outer radii will increase over ILC –Increased mass/layer due to water cooling Loss of forward region due to collimation “nose” –Can A fb measurements be retained? –Can the nose be modified? –Can it be used for cooling and services? Too early for real conclusions but it appears that excellent tracking and vertexing can be retained with moderate effective luminosity loss.