Orsay Micro-Electronics Groups Associated : « VLSI 2010» S. Ahmad, P. Barrillon, S. Blin, S. Callier, S. Conforti, F. Dulucq, J. Fleury, C. de La Taille, G. Martin-Chassard, L. Raux, N. Seguin-Moreau, D. Thienpont

22 june 2010 C. de La Taille -VLSI Building blocks SiGe 0.35 µm –2 blocs en 2009 (IPNL et OMEGA) –2 blocs en 2010 (OMEGA et LAPP) Blocs IBM ou Chartered 130 nm –N/A Activité étendue après 2011 par FP7 AIDA –SiGe 0.18 µm AMS –IBM 130 nm ou 65/90 nm

22 june 2010 C. de La Taille -VLSI Orsay Micro-Electronics pole Mutualized ASIC design team 10 research engineers (1 IR0, 2 IR1, 6 IR2, 1CDD), 2 pHD students Importance of critical mass for more and more complex circuits Cross-fertilization between projects

22 june 2010 C. de La Taille -VLSI MAROC : MultiAnode Read-Out Chip Complete front-end chip for 64 channels multi-anode photomultipliers –6bit-individual gain correction –Auto-trigger on 1/3 p.e. at 10 MHz –12 bit charge output –SiGe 0.35 µm, 12 mm 2, Pd = 5 mW/ch Bonded on a compact PCB (PMF) for ATLAS luminometer (ALFA) Also equips Double-Chooz, medical imaging… PMF Hold signal PM 64 channels Photons Variable Gain Preamp. Variable Slow Shaper ns Bipolar Fast Shaper Unipolar Fast Shaper Gain correction 64*6bits 3 discris thresholds (3*12 bits) Multiplexed Analog charge output LUCI D S&H 3 DACs 12 bits 80 MHz encoder 64 Wilkinson 12 bit ADC 64 trigger outputs (to FPGA) Multiplexed Digital charge output 64 inputs S&H P. Barrillon, S. Blin, D. Cuisy, B. Lavigne See talk by S. Blin

22 june 2010 C. de La Taille -VLSI SPACIROC ASIC ASIC Functions: Analog part: 1.Photoelectron counting (implemented LAL) 2.Time Over Threshold (collab. JAXA/Riken) Digital part (LAL): 1.Digitization, 2.Memory, 3.Send data to FPGA for triggering Crucial points Power consumption < 1 mW/ch data flow ~ 384 bits / 2.5 μs Radiation tolerance S. Ahmad, P. Barrillon, S. Blin, D. Cuisy, F. Dulucq, E. Plaige, JL Socha See talk by P. Barrillon See talk by S. Ahmad

22 june 2010 C. de La Taille -VLSI Second generation ASICs for EUDET Add auto-trigger, analog storage, digitization and token-ring readout !!! Include power pulsing : <1 % duty cycle Optimize commonalities within EUDET (readout, DAQ…) Dedicated run produced in march 2010 –25 wafers expected in june –Plastic packaging in the US FLC_PHY3 (2003) HARDROC2 SDHCAL RPC 64 ch 16 mm 2 SKIROC2 ECAL Si 64 ch. 70 mm 2 SPIROC2 AHCAL SiPM 36 ch 30 mm 2

22 june 2010 C. de La Taille -VLSI Hadronic Rpc Detector Read Out Chip –64 inputs, preamp + shaper+ 3 discris –Full power pulsing => 7 µW/ch –Fully integrated ILC sequential readout –Chip embedded in detector –in beam in –collab. LLR, IPNL, LAPP –MICROROC = version for MICROMEGAS developped with LAPP (see talk by R. Gaglione) HaRDROC : ILC DHCAL readout F. Dulucq, G. Martin-Chassard, N. Seguin-Moreau it’s gonna heat ! =>Power pulse

22 june 2010 C. de La Taille -VLSI Slab #1 Slab #2 Slab #3 DIF #1 DIF #2 DIF #3 GRPC Towards an ILC technological prototype Fully equipped scalable m 2 RPC SDHCAL detector built by IPN Lyon Fully equipped scalable large MicroMégas detector built by LAPP Annecy Ultra-low POWER : 24h operation for channels with 2 AA batteries !

22 june 2010 C. de La Taille -VLSI SPIROC : ILC AHCAL & ECAL readout SPIROC : Silicon Photomulier Integrated Readout Chip –36 channels –Internal 12 bit ADC/TDC –Charge measurement (0-300 pC) –Time measurement (< 1 ns) –Autotrigger on MIP or spe (150 fC) –Sparsified readout –Pulsed power -> 25 µW/ch –Also External users (PET, hodoscopes, µ-imaging… Aachen, Napoli, Pisa, Roma…) (0.36m) 2 Tiles + SiPM + SPIROC (144ch) PEBS :©W. Karpinski (Aachen) S. Callier, F. Dulucq, J. Fleury, L. Raux See talk by L. Raux

22 june 2010 C. de La Taille -VLSI SKIROC : ECAL readout SKIROC2 : Silicon Kalorimeter Integrated Read-Out Chip –64 channels, 70 mm 2 –Very large dynamic range: HG for MIP, LG for Mip –Low noise, low power… –Testability at wafer level Front End boards crucial element S. Callier, M. Cohen-Solal, F. Dulucq, J. Fleury, N. Seguin-Moreau PCB – FRONT PCB – BACK An ASU (Active Sensor Unit) See talk by S. Callier

22 june 2010 C. de La Taille -VLSI Joël PouthasIPN Orsay PARiSROC for PMm 2 Photomultiplier ARray Integrated SiGe Read-Out Chip –Replace large PMTs by arrays of smaller ones (PMm2 project) –Centralized ASIC 16 independent channels –Auto-trigger –Charge and time measurement (10-12 bits) –Water tight, common high voltage –Data driven : « One wire out » Application in large Water Cerenkov –Chip studied by DUSEL, LENA, LHASSO… B. Orsay See talk by S. Conforti and S. Drouet S. Conforti, F. Dulucq, M. El Berni, G. Martin-Chassard, I. Xiongbo, S. Drouet, E. Wanlin

22 june 2010 C. de La Taille -VLSI OMEGAPIX: 3D ATLAS pixels at SLHC Double tier pixel readout for ATLAS sLHC –50x50x50 µm pixels –Low power 3 µW/ch, low threshold 1000e- –Chartered/Tezzaron run may 2009 –Collab with CPPM and LPNHE G. Martin, D. Thienpont F. Wicek, I. Guo (LPNHE) See talk by D. Thienpont

22 june 2010 C. de La Taille -VLSI Chip submissions in June 2008 : Hardroc2, Parisroc1, Spiroc2 Nov 2008 : test structures for ATLAS calo upgrade March 2009 : Omegapix (Chartered 3D 130nm) June 2009 : Hardroc2b September 2009 : Spiroc0 November 2009 : Parisroc2 march 2010 : spaciroc JEM/EUSO march 2010 : Production run SiGe EUDET June 2010 : Microroc1 (micromegas R/O) July 2010 : Omegapix2

22 june 2010 C. de La Taille -VLSI Conclusion MAROC, HaRDROC, SKIROC, SPIROC… –SoC : System on chip (ADC, TDC, DAQ…) –High synergy between chips –Production in 2010 in a dedicated run ILC main customer –Many external requests –Long and difficult measurements… Diversification –3D electronics 130nm –Spatial applications –Many Spin-offs : mainly SPIROC : PET (Siemens), vulcanology, PEBS, KEK, IHEP… 3rd Administration LAL 7/7

22 june 2010 C. de La Taille -VLSI Communication  Web site Provide up-to-date datasheets, application notes, firmware, etc.