Microprocessors CSE- 341 Dr. Jia Uddin Assistant Professor, CSE, BRAC University Dr. Jia Uddin, CSE, BRAC University

Instruction Set and Addressing Modes Dr. Jia Uddin, CSE, BRAC University

Instruction Set Addressing Modes: a method of specifying an operand – Operands : in REG, Memory, I/O ports, and within Instruction * Control Transfer : direct, indirect addressing the modes available register addressing : REG immediate addressing: within Instruction direct addressing register indirect addressing based addressing indexed addressing based indexed addressing MEM or I/O Dr. Jia Uddin, CSE, BRAC University

Addressing Modes Dr. Jia Uddin, CSE, BRAC University

Addressing Modes Dr. Jia Uddin, CSE, BRAC University

Addressing Modes – Register Operand Addressing Mode can be accessed in byte, word, or double word sizes. MOV AX, BX Byte: AL, AH, BL, BH, CL, CH, DL, DH Word: AX, BX, CX, DX, SP, BP, SI, DI, CS, DS, SS, ES, FS, GS Double Word: EAX, EBX, ECX, EDX, ESP, EBP, ESI, EDI – Immediate Operand Addressing an operand is part of the instruction MOVAL, 15H 8 bits, 16 bits, and 32 bits in length Dr. Jia Uddin, CSE, BRAC University

Direct Addressing 16-bit Memory Operand Addressing Modes – 16-bit addressing modes – Physical address = Segment Base: EA(effective address) Segment Base Address(SBA) : the starting location of the segment EA : the offset of the operand from the beginning of the segment of memory EA = Base + Index + Displacement Base = BX or BP, Index = SI or DI, displacement = 8-bit or 16-bit Dr. Jia Uddin, CSE, BRAC University