1 MAPLD2005/1004 sakaide Evaluation of Actel FPGA Products by JAXA Yasuo SAKAIDE 1, Norio NEMOTO 2 Kimiharu Kariu 1, Masahiko Midorikawa 1, Yoshiya Iide.

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Presentation transcript:

1 MAPLD2005/1004 sakaide Evaluation of Actel FPGA Products by JAXA Yasuo SAKAIDE 1, Norio NEMOTO 2 Kimiharu Kariu 1, Masahiko Midorikawa 1, Yoshiya Iide 1, Masakazu Ichikawa 1, Tamotsu Yokose 1, Yoshihisa Tsuchiya 1, Toshifumi Arimitsu 1, Noriko Yamada 2, Hiroyuki Shindou 2, Satoshi Kuboyama 2, Sumio Matsuda 2, and Takashi Tamura 2 High-Reliability Components Corporation (HIREC) 1 Japan Aerospace Exploration Agency (JAXA) MAPLD International Conference

2 MAPLD2005/1004 sakaide Failures on programmed anti-fuse of Actel FPGA products which were built in the 0.25 um MEC/Tonami process have been reported in U.S. since Failures on programmed anti-fuse of Actel FPGA products which were built in the 0.25 um MEC/Tonami process have been reported in U.S. since Japan Aerospace Exploration Agency (JAXA) started to evaluate Actel FPGA products; A54SX-A (MEC) and RTSX-SU (UMC) in the end of Japan Aerospace Exploration Agency (JAXA) started to evaluate Actel FPGA products; A54SX-A (MEC) and RTSX-SU (UMC) in the end of Test Objectives -MEC die devices- To determine the acceleration factors of the antifuse failures by performing operational life tests at various temperatures. To determine the acceleration factors of the antifuse failures by performing operational life tests at various temperatures. -UMC die devices- To evaluate the reliability for space applications by performing long-term life tests and radiation tests. To evaluate the reliability for space applications by performing long-term life tests and radiation tests.

3 MAPLD2005/1004 sakaide Test Item Condition Sample size A54 SX32A (MEC) A54 SX72A (MEC) RT SX32SU (UMC) Operational Life Test 25 deg.C, 1MHz, 1000H deg.C, 1MHz, 1000H deg.C, 1MHz, 1000H deg.C, 33MHz, 1000H4577- Temperature Cycling Test-65 to +150deg.C,1000 cycles Radiation Test Single Event Effect (SEL/SEU) --5 Total Ionizing Dose (TID)--5 Test Item and Conditions Note: MEC devices are programmed with the “old programming algorithm (ver.4.42)”. UMC devices are programmed with the “original programming algorithm (ver.4.48)”.

4 MAPLD2005/1004 sakaide Evaluation test circuit – Diagram x4:32A/32SU x8:72A Test Vehicle (1) Design features 1- 4-input AND-OR chains: 1- 4-input AND-OR chains :  Maximum utilization of antifuses  Maximum utilization of antifuses 2- Stable operation using an external clock circuit: an external clock circuit:  Easier failure detection  Easier failure detection 3- R-cells driven by skewed clock:  Delays detectable to less than 10nsec  Delays detectable to less than 10nsec 4- Continuous monitoring of XORed outputs from the same circuit block:  Real-time detection of failures  Real-time detection of failures

5 MAPLD2005/1004 sakaide Design type Low Current Fuse Count (I,S,K,B) High Current Fuse Count (F,X,G,V,H,W) Dynamic fuse Count (Total) Part No. Circuit Block Count JAXA A54SX32A RTSX32SU A54SX72A8 Colonel Test RT54SX32S - General Test RT54SX32S - NASA RTSX32SU - Test Vehicle (2) The number of antifuses in test vehicles

6 MAPLD2005/1004 sakaide Test Results (1): Weibull Plots Weibull plots for 72A samples were successfully obtained and the failure mode was infant mortality. Weibull plots for 32A samples were slightly different and and statistically poor because of small sample size.

7 MAPLD2005/1004 sakaide Test Results (2): Failure Rate as a Function of Time Failure rates were calculated based on the Weibull plots for 72A samples. The failure rates are consistent with 32A and 72A data within practical application purpose. It was considered that the difference of the failure rate was caused by lot difference because of the same structure of 32A and 72A.

8 MAPLD2005/1004 sakaide Test Results (3): Acceleration Factor Temperature acceleration factor was calculated based on the Weibull plots for 72A samples Given activation energy was too small to screen out the defective antifuses throughtout PPBI (125 deg.C, 240 hours) E a =0.002eV

9 MAPLD2005/1004 sakaide Conclusions Weibull plots for the antifuse failures of A54SX-A (MEC) FPGAs were successfully obtained. The failure mode was infant mortality. Given temperature acceleration factor was too small to screen out the defective antifuses throughout PPBI (125deg.C 240hours). No defective antifuses were observed for RTSX-SU (UMC) FPGAs. Based on the results, the MEC die FPGAs shall be replaced with UMC ones by decision of JAXA projects.