Implementation of LFSR Counter Using CMOS VLSI Technology.

Slides:

Advertisements

Similar presentations

Basic Finite State Machines 1. 2 Finite State Machines Binary encoded state machines –The number of flip-flops is the smallest number m such that 2 m.

Advertisements

Selected Design Topics. Integrated Circuits Integrated circuit (informally, a chip) is a semiconductor crystal (most often silicon) containing the electronic.

Pass Transistor Logic. Agenda  Introduction  VLSI Design methodologies  Review of MOS Transistor Theory  Inverter – Nucleus of Digital Integrated.

Dynamic Scan Clock Control In BIST Circuits Priyadharshini Shanmugasundaram Vishwani D. Agrawal

On-Chip Structures for the 1.6 and 0.6  m Designs 1.6  m chip Final layout.

ENGIN112 L26: Shift Registers November 3, 2003 ENGIN 112 Intro to Electrical and Computer Engineering Lecture 26 Shift Registers.

Flip Flops. Clock Signal Sequential logic circuits have memory Output is a function of input and present state Sequential circuits are synchronized by.

Lecture 1 Combinational Logic Design & Flip Flop 2007/09/07 Prof. C.M. Kyung.

Flip_Flops  Logic circuits are classified ito two groups  1. The combinational logic circuits,using the basic gates AND,OR and NOT.  2. Sequential.

Circuit, State Diagram, State Table

1 DIGITAL ELECTRONICS. 2 OVERVIEW –electronic circuits capable of carrying out logical (boolean) and arithmetic operations on information stored as binary.

More Digital circuits. Ripple Counter The most common counter The problem is that, because more than one output is changing at once, the signal is glichy.

Lecture #27 Page 1 ECE 4110– Sequential Logic Design Lecture #27 Agenda 1.Counters Announcements 1.HW #12 due.

Abdullah Said Alkalbani University of Buraimi

D FLIP FLOP DESIGN AND CHARACTERIZATION -BY LAKSHMI SRAVANTHI KOUTHA.

Modulo-N Counters According to how they handle input transitions –Synchronous –Asynchronous.

9/15/09 - L19 Sequential CircuitsCopyright Joanne DeGroat, ECE, OSU1 Sequential Cirucits.

CHAPTER 5 Combinational Logic Analysis

Lecture #27 Page 1 ECE 4110–5110 Digital System Design Lecture #27 Agenda 1.Counters Announcements 1.Finish reading Wakerly sections 8.1, 8.2, 8.4, 8.5.

ECEN 248: INTRODUCTION TO DIGITAL SYSTEMS DESIGN Dr. Shi Dept. of Electrical and Computer Engineering.

1 Homework Reading –Tokheim Chapter 9.1 – 9.6 Machine Projects –Continue on mp3 Labs –Continue in labs with your assigned section.

Logic Families.

2018/5/2 EE 4271 VLSI Design, Fall 2016 Sequential Circuits.

Homework Reading Machine Projects Labs Tokheim Chapter 9.1 – 9.6

Copyright © 2004 The McGraw-Hill Companies, Inc. All rights reserved.

Digital Fundamentals Abdul Hameed

VLSI System Design Lecture: 1.3 COMS LOGICs

EKT 124 / 3 DIGITAL ELEKTRONIC 1

Each I/O pin may be configured as either input or output.

Hardware Testing and Designing for Testability

PROPAGATION DELAY.

Sequential Logic Counters and Registers

Figure 12-13: Synchronous Binary Counter

SLIDES FOR CHAPTER 12 REGISTERS AND COUNTERS

FIGURE 5.1 Block diagram of sequential circuit

Sequential Circuit: Counter

2018/8/29 EE 4271 VLSI Design, Fall 2013 Sequential Circuits.

Sequential Circuit - Counter -

3.2 Shift Register Basic shift register function

Reading: Hambley Ch. 7; Rabaey et al. Sec. 5.2

Introduction to Sequential Logic Design

Registers and Counters Register : A Group of Flip-Flops. N-Bit Register has N flip-flops. Each flip-flop stores 1-Bit Information. So N-Bit Register Stores.

Lesson Objectives Aims

COE 202: Digital Logic Design Sequential Circuits Part 4

COMBINATIONAL LOGIC.

Lecture Part A Combinational Logic Design & Flip Flop

ECEN 248: INTRODUCTION TO DIGITAL SYSTEMS DESIGN

Layout of CMOS VLSI Circuits

Layout of CMOS VLSI Circuits

ELEC-7250 VLSI Testing Scan Design Implementation on ISCAS ’89 Benchmark Circuits – s1423 and s1512 Completed by: Jonathan Harris.

CSE 370 – Winter Sequential Logic-2 - 1

EET107/3 DIGITAL ELECTRONICS 1

Chapter 1 INTRODUCTION.

Lecture 17 Logistics Last lecture Today HW5 due on Wednesday

Implementation Technology

University of Maryland Baltimore County Department of Computer Science and Electrical Engineering CMPE 212 Laboratory (Discussion 10) Hasib Hasan

Thought of the Day To be what we are, and to become

Combinational Circuits

Digital Logic Department of CNET Chapter-6

Digital Logic Department of CNET Chapter-6

Flip Flops Unit-4.

Sequential Circuits UNIT- IV

Lecture 17 Logistics Last lecture Today HW5 due on Wednesday

Combinational Circuits

1.Introduction to Advanced Digital Design (14 marks)

Digital Electronics and Logic Circuit

A Random Access Scan Architecture to Reduce Hardware Overhead

2019/9/26 EE 4271 VLSI Design, Fall 2012 Sequential Circuits.

Presentation transcript:

Implementation of LFSR Counter Using CMOS VLSI Technology

Aim of Presentation To reduce the power consumption and delay LFSR using Transmission Gates and Pass Transistors

Existing Problems & Proposed System Advancement of LSI –More no of Transistors Heat dissipation, power consumption, time delay LFSR Counter using D FFs- Transmission Gates, Pass Transistors

What Is LFSR It is a shift register that, when clocked moves the signal through the register from one flip flop to next. Some of the outputs are combined in exclusive-OR configuration to form a feedback mechanism.

Working And Pattern Generation The sequence of numbers generated by a LFSR - a binary numerals As valid Gray code or the natural binary code

DESIGN ASPECTS Designed D-flip flop by using following different components NAND Gates. Transmission gates and inverter. Pass transistors.

DESIGN WITH NAND GATES LOGIC CIRCUIT

LAYOUT IN MICROWINDVOLTAGE Vs TIME P=56.001µWLAYOUT AREA x7.44µm

DESIGN WITH TRANSMISSION GATES LOGIC CIRCUIT

LAYOUT IN MICROWINDVOLTAGE Vs TIME P=19.281µWLAYOUT AREA x8.58µm.

DESIGN WITH PASS TRANSISTORS LOGIC CIRCUIT

LAYOUT IN MICROWINDVOLTAGE Vs TIME P=18.890µWLAYOUT AREA x7.68µm.

Comparison of lfsr in different nm TECHNOLOGIES

CONCLUSION This paper concludes that LFSR counter is best implemented using the pass transistors. Thus LFSR implemented in CMOS chip technology, is the best illustration of VLSI.