Draft of 3 year CMOS Strip Programme Need to advise WG3 on likely resource requirement Draft Outline provided at Valencia Discuss and improve basis for estimates in WG1

Four Phase Programme Resources and Deadlines Define programme and identify Resources Establish Group with strip tracker goal Break Point 1 Mid 2014 Group established, resources secured for Phase-1 Phase 0 now – mid 2014

Requirements – software and paper study for physics requirements on o the tracker layout, o physics hit rates, o noise hit rates, o trigger hit rates o radiation hardness requirements o acceptable dead area o efficiency requirements o radiation length limitations o requirements on assembly precision, survey Requirements – hardware restrictions o Power consumption o Uniformity of cooling o Flatness of sensors o Data rates Architecture & Mechanics o Architecture to focus on selected o Upgrade path to advanced architectures defined o Impact on module and macro assembly understood o Impact on mechanics optimisation understood o Sensor thickness selected on mechanical grounds Phase 1 mid-2014 to mid-2015

Sensor & Readout o Relevant foundries selected o HR and HV CMOS processes evaluated with basic devices. o Bulk and Surface Radiation hardness evaluated o Hit efficiency evaluated with representative devices, within a pixel o Charge collection efficiency understood, or close to o S/N S/T measured to be acceptable o Boundary electronics architecture understood o Cut lines, stitching, multi-reticule possibilities evaluated. o Common read-out selected Administrative o Re-evaluation of schedule, resource requirements and programme time scales o External review Phase 1 mid-2014 to mid-2015

Resource Requirement The phase 1 resource can be mostly staff as test structures exist and new ones can be part of multi-project runs. 2 FTE engineer equivalent. Sensor design & read-out and interface card design/test 2 FTE evaluation and test ? FTE software ½ FTE admin/organisation 60kCHF submissions and components for test equipment. 20kCHF travel Phase 1 mid-2014 to mid-2015 Break Point 2 Mid 2015 – basic technology demonstrated to be acceptable Foundries selected, architecture selected Layout and performance found to be compatible Requirements Established Resources for phase-II identified

Phase – II Mid-2015 to mid 2016 Sensor Large scale sensor with close to full functionality fabricated o Large scale sensor with close to full functionality fabricated o Bulk and Surface Radiation hardness evaluated o Hit efficiency evaluated including, within a pixel o Charge collection efficiency understood o S/N S/T measured to be acceptable o Boundary electronics architecture tested o Design of digital encoding periphery completed* o Test structure for digital encoding fabricated and tested * Mechanics o Any substantive changes required in mechanics evaluated o Test parts fabricate for any essential new elements o Consideration given to service module alterations. o Service tapes redesigned to accommodate new module configurations ABCn’ o ABCn’ designed and test chips fabricated in multi-user run o Consideration started of digital encoded version of ABCn’’ * Administrative o Re-evaluation of schedule, resource requirements and programme time scales o External Review o Secure Resources for phase III

Break Point III mid-2016large scale device demonstrated ABCn’ designed and fabricated Resources required for phase-III secured Resource Requirements 2 FTE engineer equivalent. Sensor design & read-out and interface card design/test 2 FTE evaluation and test ½ FTE on mechanical considerations. ½ FTE admin/organisation 500kCHF submissions and components for test equipment. 30kCHF travel Phase – II Mid-2015 to mid 2016

Phase III Mid 2016 – Mid 2017 ABCn’ o Tested with sensor prototypes from phase II o Fabricated in significant quantities o ABCn’’ designed and fabricated in multi-user run Sensor o Full scale sensors designed and fabricated o Sensors fully characterised o Sensors and ABCn’’ operated in module-like configuration o Digital encoded sensor fabricated* o >1 module operated together on a service tape Mechanics o Changes to accommodate new layout and stave/petal designed o Assembly protocols and series production planning considered Administrative o Planning for decision to adopt CMOS sensors in preference to planar o Mechanical, schedule implications evaluated o Costs fully evaluated o Programme review

Resource Requirements 2 FTE engineer equivalent. Sensor design & read-out and interface card design/test 2 FTE evaluation and test 2 FTE on mechanical considerations. ½ FTE admin/organisation 600kCHF submissions and components for test equipment. 40kCHF travel Phase III Mid 2016 – Mid 2017 Break Point IIIDemonstrated multi-sensor test structure Advanced planning for mechanical changes required Understood resource & schedule implications