25 um pitch 100 um pitch 50 um pitch 25 um pitch Individual SPADs 1 mm APD Nominal “standard” Devices: 25 um pitch ~50% fill factor AR coated > 20% DE? With bypass C 50 um, 100 um pitch For perimeter/Area Single element APD with Approximately same area As SPAD array Individual SPAD elements: w/ and w/o quench 5 um – 100 um sizes Guard ring … tie to substrate to eliminate leakage, if necessary

25 um pitch 100 um pitch 50 um pitch 25 um pitch Individual SPADs 1 mm APD Trenches & Cleave lines

25 um pitch 1 mm Area/device: 1 mm photosensitive, 1.1 mm x 1.1 mm actual 300 um for bonding pad 200 um for 1mm 2 cleaving (& trench) 500 um for full die cleaving Area for array: 5.4 mm x 5.2 mm Previous Generation 5 is 5.5 mm x 5.5 mm Nominal 20 um x 20 um SPAD active area (Margin +/- 25%) Nominal SPAD capacitance is 40 fF Nominal resistance is 500 kOhm (margin factor 2X) Nominal RC = 20 ns

New Features (compared to previous samples) Further optimized fabrication: – best possible quench resistor (same as was included in latest Gen 5++ devices) – Trenches between arrays (same as was included in latest Gen 5++ devices) 1 mm x 1 mm SPAD arrays (allows more devices per chip) Simplified 25 um pitch process. Reduce the number of steps (masks) by 30%, relaxes alignment tolerance to 1.0 um (previous devices had 0.25 um alignment tolerance). Greatly lowers costs and reduces fabrication time. All devices will have anti-reflection coating and dielectric encapsulation. Improves quantum efficiency and radiation hardness. Previous Gen 5 devices were designed to incorporate this AR/encapsulation, but problems with the AlGaAs oxidation resulted in encapsulation being dropped. One-half of the 25 um pitch devices will incorporate a bypass capacitor: – Increases the total capacitance by a factor of 2X – Increases the pulse amplitude by at least 10X … Much easier to distinguish individual pulse heights, even after irradiation – Decreases fill factor (quantum efficiency) by about 8% – Will nominally have 2X gain and 2X longer reset time. Longer reset time may offset radiation damage. Nominal RC w/o bypass capacitor is 20 nsec (45 nsec fall time) Nominal RC w/ bypass capacitor is 40 nsec (90 nsec fall time) Future designs can offset increase in capacitance with smaller and/or lower capacitance SPAD elements)

New Features of delivered die Nominally have 10 detectors per chip: – 4 of the 25 um pitch w/o bypass capacitor – 4 of the 25 um pitch w/ bypass capacitor – 1 with 50 um pitch w/ bypass capacitor – 1 with 100 um pitch w/ bypass capacitor Center region of die has test devices: – Individual SPADs: 5 um, 10 um, 25 um, 50 um, 100 um, 250 um: w/ and w/o quench R (allows use of external R for quench) w/ and w/o bypass C (only on w/ internal R … external R always has external C). – Individual 1 mm diameter device: nominally same active area as the 25 um pitch square 1 mm x 1 mm array. Useful for QE measurements and general avalanche photodiode measurements (not SPAD or Geiger). – Center devices can be measured on probe station before/after irradiation to provide additional data. Useful for tracking down issues.

Gen 5 vs. Gen 6 Gen 5 Known/available epitaxy MOCVD: – Low oxygen contamination – Near thermal equilibrium … potentially lower defects – Ordering (InP alternating with GaP) … defects arise because ordered GaInP 2 different from disordered GaInP 2. Problem with AlGaAs window layer … oxidizes during processing: – Al 2 O 3 has surface defects – Degrades blue quantum efficiency – May impact radiation hardness (similar to SiO 2 vs. Si 3 N 4 in silicon) Gen 6 Must purchase additional epitaxy (4-6 week delay). Quality unknown. MBE: – Higher oxygen contamination … oxygen related defects – Lower temperature growth … further from equilibrium, potentially higher defects – Reduces/eliminates ordering New Window layer: GaInP/AlGaAs/GaInP stack: GaInP protects AlGaAs during processing, eliminating oxidation: – GaInP protection layer 10 nm thick to minimize degradation in optical properties

Summary Gen 5 vs. Gen 6 Gen 6 has improved window layer … better QE and surface protection. Gen 5 has proven epitaxy MOCVD vs. MBE: – MOCVD: “better quality” due to closer to thermal equilibrium, less contamination. However, GaP/InP layer ordering problematic: Used for solar cells, LEDs, transistors – MBE: “lesser quality” due to lower temperature growth (further from equilibrium), more oxygen contamination, GaP/InP layer ordering less problematic: Used for laser diodes, transistors – Both techniques have advocates and detractors, and choice of MOCVD vs. MBE is “it depends”. Semiconductor quality is likely vendor dependent. We have used both MBE and MOCVD and different vendors, but changing designs makes it impossible to accurately compare. MBE chosen for Gen 6 because 10 nm thickness GaInP in window layer is easily achieved by MBE (not very easy to achieve with MOCVD).

Recommendation Doing both Gen 5 and Gen 6 together saves costs (uses same mask set, can do side-by-side processing). Confirm Gen 5: – Results are repeatable. – Revised processing produces comparable/better results. Compare Gen 5 to Gen 6: – Window (blue QE and rad hardness) – Epitaxy (MBE vs. MOCVD & vendor): dark count rate vs. bias. Other techniques also available (DLTS, CV, diode recovery): Window should not affect pre-irradiation dark count rate substantially, mostly an efficiency effect. Post irradiation further losses in quantum efficiency, more surface leakage, and potentially dark count generation at the surface.

Quotation Summary Gen 5 alone: $115,000 Gen 6 alone: $125,000 Gen 5 + Gen 6:$210,000 Gen 7 alone:ROM $195,000