P. Name Nikhef Amsterdam Electronics- Technology Vladimir Gromov, NIKHEF, Amsterdam. GOSSIPO-3 Meeting March 31, More on the Preamplifier

P. Name Nikhef Amsterdam Electronics- Technology Preamplifier: DC feedback I in (t), Qin Output charging discharging Input Id gds Id gds int. impedance Uout - Uin 0 0 No signal : Uout = Uin - Id=0 - 1/gds=30MΩ (input bias & stability) Small signal : Uout – Uin < 70mV - 0< Id< Isat (triode region) - 1/gds ≈ 30MΩ Isat Large signal : Uout – Uin > 70mV - Id ≈ Isat (saturation region) - gds → 0 Time 0 Cfb =1fF Uin Uin + 70mV Uin + Qin / Cfb (max 500mV) -Time ● Isat/Cfb exp[-Time/(Cfb/gds)] ToT=350ns (max) → 1fF●500mV / 350ns = Isat ≈ 1nA 1 / 30MΩ GOSSIPO-3 Meeting 24/03/2009 V. Gromov 2

P. Name Nikhef Amsterdam Electronics- Technology Discharging: large signal (saturation) region discharging charging Cfb =1fF Io=6nA lvtpfet 2.4u/2.4u lvtpfet 0.24u/2.4u 226mV Csd =0.2fF 226mV 207mV I discharge ≈ 1nA → weak inversion region (Vgs<< Vthr) β→min (W/L→min) Id= 2●n●μ hole ●Cox ●( W/L )●U T 2 ● exp[(Ugs- Uthr)/(n●U T ) ] ● [1- exp( - Uds / U T )] ≈1.25 ≈4.5 ●10 10 μm 2 /(V ●sec) =ε●εo/d= 4.5pF/m /2.2nm = 2fF/ μm 2 =kT/e ≈ 26mV (at 300°C) ≈ 108mV ≈1.25 =kT/e ≈ 26mV (at 300°C) →0 (Ugs →0) →1 in saturation when: Uds >> UT - assume: L=0.24μ & W=2.4μ → Csd ≈ 0.2fF << Cfb=1fF - assume: Large signal region Uds > 70mV (saturation) required: Id ≈ 1nA → Ugs ≈ 18mV << Uthr=108mV !!! For obtaining 1nA current the adjacent transistor should have higher W/L ratio. This let us use the larger reference current (6nA) which is easier to generate. In addition it improves statistical spread (see later). Sufficient headroom for a real current source →1nA GOSSIPO-3 Meeting 24/03/2009 V. Gromov 3

P. Name Nikhef Amsterdam Electronics- Technology Discharging: small signal (triode or linear) region discharging charging Cfb =1fF Io=6nA lvtpfet 2.4u/2.4u lvtpfet 0.24u/2.4u 226mV Csd =0.2fF 226mV 207mV Sufficient headroom for a real current source Id= 2●n●μ hole ●Cox ●( W/L )●U T 2 ● exp[(Ugs- Uthr)/(n●U T ) ] ● [1- exp( - Uds / U T )] gds=1/Ron= d(Id)/d(Uds)= = 2●n●μ hole ●Cox ●( W/L )●U T ● exp[(Ugs- Uthr)/(n●U T ) ] ● exp( - Uds / U T ) →0 in triode region when: Uds <<U T →1 in triode region when: Uds <<U T - assume: L=0.24μ & W=2.4μ → Csd ≈ 0.2fF << Cfb=1fF - assume: Small signal region Uds << 70mV (triode) -assume Ugs ≈ 18mV << Uthr=108mV ↓ Ron ≈ 30MΩ !!! Low threshold PFET’s are to be used in order to provide sufficient headroom for the biasing current source: Uds curr.source = Ugs NFET – Ugs LVTPFET !!! Isolation of the transistors (current leakage) ≈ 226mV ≈ 18mV ≈ 207mV GOSSIPO-3 Meeting 24/03/2009 V. Gromov 4

P. Name Nikhef Amsterdam Electronics- Technology Discharging: simulation results Vdd_ana Input stage 5/ nA Ub 0.32/1.2 Ron = 30MΩ 0.24/2.4 Ub2 U out To Comp 1.2/ nA 70 nA 2/ / / /2.4 Preamp_in 1fF C par ≈ 3 fF 6 nA Voltage follower DC feedback Gnd_ana gm=23u C*=4.5f lvtpfet’s saturation triode I discharge ≈1nA Ron≈30MΩ 20% of the charge flows into Csd(T fb ) T fb Idrain (T fb ) Csd(T fb ) ≈ 0.2fF GOSSIPO-3 Meeting 24/03/2009 V. Gromov 5

P. Name Nikhef Amsterdam Electronics- Technology Signals 1 ● 430e - = 430e - 2 ● 430e - = 860e - 4 ● 430e - = 1720e - 8 ● 430e - = 3440e - 16 ● 430e - = 6880e - 32 ● 430e - = 13760e - 64 ● 430e - = 27520e - Time-over threshold threshold ToT=0…3us Qin, e - Amp, mV ToT, ns !!! ToT stays linear up to e - But it requires ToT dynamic range 0 … 2.2μsec GOSSIPO-3 Meeting 24/03/2009 V. Gromov 6 Output charging discharging Uin (226mV) Cfb =1fF Cpar =10fF discharging Id =1nA ∆t max ≈ Uin●Cpar / Id = 0.22V●10fF/1nA = = 2.2μsec (22 000e - ) ∆t max =2.2μsec Q max = e - Uin < 0 Uin =226mV 0<Uin<226mV

P. Name Nikhef Amsterdam Electronics- Technology Channel-to-channel statistical spread Id sat = 2●n●β●U T 2 ● exp[(Ugs- Uthr)/(n●U T ) ] d(Id sat )/dβ = Id sat /β → σ{∆(Id sat )/Id sat }=σ{∆β/β} = 1.82% / √(W ● L ) d(Id sat )/dUthr = Id sat / (n●U T )] → σ{∆(Id sat )/Id sat } = σ{∆ Uthr / n●U T } = 2.86mV/[30mV ● √(W ● L )]= 9.5% / √(W ● L ) = 12% !!! Statistical spread ~ 1 / √(W ● L ). By making the feedback transistor larger we improve matching but increase Csd → gain degradation threshold GOSSIPO-3 Meeting 24/03/2009 V. Gromov 7 =2.4μm =0.24μm 500ns ± 200ns (40% or 3 ●σ{∆(Id sat )/Id sat } ? ? → A β [% / μm] → A Vthr [mV / μm]

P. Name Nikhef Amsterdam Electronics- Technology GOSSIPO-3 Meeting 24/03/2009 V. Gromov 8 Vdd_ana Input stage 5/ nA Ub 0.32/1.2 Ron = 30MΩ 0.48/2.4 Ub2 U out 30fF To Comp 1.2/ nA 70 nA 2/ / / /2.4 Preamp_in C par ≈ 3 fF 6 nA Voltage follower DC feedback Gnd_ana gm=23u C*=4.5f T fb Csd+Csg+Csb+Csj ≈ 1.3fF lpnfet A new schematic saturation triode I discharge (external) <<1 nA → internal T fb discharging Ron≈30MΩ 80% of the charge flows into T fb Idrain (T fb ) Modifications : - larger feedback PFET : W=0.48u L=2.4u (should improve mismatch) - feedback PFET’s are standard not lvtpfet - no fringe metal-to-metal capacitor (1fF) - input transistor is LPNFET (high threshold transistor).

P. Name Nikhef Amsterdam Electronics- Technology threshold 130ns ± 30ns (20% ) A new schematic : simulations results Channel-to-channel statistical spread GOSSIPO-3 Meeting 24/03/2009 V. Gromov 9

P. Name Nikhef Amsterdam Electronics- Technology A new schematic : simulations results. Time-over threshold Output charging discharging Uin (520mV) Cfb =1.3fF Cpar =10fF discharging Id =1nA ∆t max ≈ Uin●Cpar / Id = 0.520V●10fF/1nA = 5.2μsec (30 000e - ) Signals 1● 430e - = 430e - 2● 430e - = 860e - 4● 430e - = 1720e - 8● 430e - = 3440e - 16● 430e - = 6880e - 32● 430e - = 13760e - 64● 430e - = 27520e - Qin, e - ToT, ns ∆t max =4μsec Q max = e - Uin =520mV 0<Uin<520mV dU/dt = Id/Cfb ≈1nA/1fA = 1mV/ns ↓ σ(Noise jitter) = σ(Uout noise )/ [dU/dt] ↓ 5 ● σ(Noise jitter) = 27ns (200 e - ) threshold =5.4mV =1mV/ns =5.4ns ≈ 25ns (one bin of the ToT counter) Resolution or Time jitter caused by noise 0.13ns / e - Uout,mV Uin,mV =40 e - GOSSIPO-3 Meeting 24/03/2009 V. Gromov 10

P. Name Nikhef Amsterdam Electronics- Technology A new schematic : simulations results. Time-over threshold Vdd_ana 5/ nA Ub 0.32/1.2 Ron = 30MΩ 0.48/2.4 Ub2 U out To Comp 1.2/ nA 70 nA 2/ / / /2.4 Preamp_in C par ≈ 3 fF 6 nA Gnd_ana gm=23u C*=4.5f T fb Csd+Csg+Csb+Csj ≈ 1.3fF lpnfet Id 1) Sensitivity to the bias discharge current ∆(ToT) / ToT = ∆Id / Id !!! Instability of Id << 40% (stat. spread) 2) Sensitivity to the temperature change ∆(ToT) / ToT = -2%/10°C !!! Low sensitivity 3) Sensitivity to the power supply voltage instability Qin<3500 e - : ∆(ToT) / ToT ≈ 0 Qin>3500 e - : ∆(ToT) / ToT ≈ -2%/100mV !!! Low sensitivity GOSSIPO-3 Meeting 24/03/2009 V. Gromov 11

P. Name Nikhef Amsterdam Electronics- Technology U THR_pixel Cfb =1.3fF A new schematic : coupling to the comparator Comparator MIMcap C AC =200fF NFET 0.48/2.4 NFET 1.92/2.4 Id=2 nA Vdd_ana U THR_common U out_preamp U in_com U out_preamp U in_com Umax ∆U = Id ● ToT / C AC << Umax 0<ToT<4us = 300mV = 0.7nA = 4μs = 0.2pF 16mV charging !!! To avoid signal distortion : C AC ↑ & Id↓ discharging GOSSIPO-3 Meeting 24/03/2009 V. Gromov 12

P. Name Nikhef Amsterdam Electronics- Technology Non-standard FET’s – free Preamp Modifications : - all NFET’s are in floating P-wells (triple-well NFET) - input NFET’s are placed into the P-well biased to + 0.2V - no LPNEFT’s or LVTPFET’s are in the circuit - all transistors in the circuit are standard. P-sub (0V) N-well (+1.2V) P-well_A (+0.2V) P-well_C (Uout_preamp) P-well_D (0V) P-well_E(0V) Preamp_in Preamp_out OPAMP DC-feedback Protection GOSSIPO-3 Meeting 14/04/2009 V. Gromov 13

P. Name Nikhef Amsterdam Electronics- Technology Non-standard FET’s – free Preamp Monte-Carlo simulations threshold 130ns ± 30ns (20% ) DC(U preamp_in )= DC(U preamp_out )= U P-well_A+ Ugs = +0.2V+0.23V= 0.43V U preamp_out GOSSIPO-3 Meeting 14/04/2009 V. Gromov 14

P. Name Nikhef Amsterdam Electronics- Technology C SP =20fF SiProt InGrid Q dis = U HV ●C SP = 8pC U HV = - 400V Preamp Discharge: size of the signal GOSSIPO-3 Meeting 14/04/2009 V. Gromov 15

P. Name Nikhef Amsterdam Electronics- Technology n+n+ n+n+ P-well Discharge protection: Q dis = 8pC In_preamp GND Standard NFET of small area (W=1μm, L=0.24 μm) U In_preamp No protection With protection ← -1V (no damage of the MOSFET’s) ← -7.5V (the MOSFET’s will be damaged) QinU In_preamp I MOS_channel I diode 0.8pC-0.554V100%0% 2pC-0.841V95%5% 4pC-0.931V55%45% 8pC-0.983V30%70% 16pC-1.07V15%85% I MOS_channel p+p+ GND I diode place the bulk contacts as close as possible to the In_preamp terminal in order to avoid effect of the serial resistance of the bulk volume. n-type inversion layer GOSSIPO-3 Meeting 14/04/2009 V. Gromov 16

P. Name Nikhef Amsterdam Electronics- Technology n+n+ p+p+ n+n+ P-well Discharge protection I leak =10pA…250pA (mismatch+process) ↓ U out_preamp = Rfb ● I leak = 30MΩ ● 250pA=7.5mV (worst case) ← negligible Small area :W=1μm, L=0.24 μm ↓ C par = Cds+Cdb+Cdg+Cdj = 1.28fF ← negligible In_preamp (Udc=+0.424V ) GND Standard NFET of small area (W=1μm, L=0.24 μm) I leak C par GOSSIPO-3 Meeting 14/04/2009 V. Gromov 17

P. Name Nikhef Amsterdam Electronics- Technology