Computer Memory Testing System for Nano-Satellite Matthew Demi Vis 1.

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Presentation transcript:

Computer Memory Testing System for Nano-Satellite Matthew Demi Vis 1

Overview Purpose Design Considerations Design Hardware Software Implementation 2

Purpose Now that Low Earth Orbit (LEO) is becoming easier to access, and nano-satellites are becoming more common, pressure for cheaper solutions to space- faring technology is on the rise. Characterizing the risk of using Common Off The Shelf (COTS) data storage could make it feasible for use in low-cost systems. 3

Design Considerations Form factor For use in small, low-cost host system Power Consumption Minimal impact on host system Durability Endure rigors of launching to and being in LEO Diverse COTS memory architectures Characterize risk in as many options as possible 4

Design - Hardware 5 Common-of-the-shelf memory types Microchip PIC24F microcontroller for low-power and high durability Radiation shielded central controller to avoid erroneous errors. 5 FlashNon-volatileSusceptible SRAMVolatileSusceptible DRAMVolatileSusceptible FRAMNon-volatileTheoretically resistant MRAMNon-volatileTheoretically resistant

Design - Software Configurable data collection rate - power Sleep most time Different missions, different time periods Communicate via UART to: request time for timestamping of data respond to requests for data Error characterization 6 Single-event upset Tie high/low bit Neighbor influence Latch up over time

Implementation Hardware Memory dispersed all around board CubeSat Kit bus for communication Central PIC will be shielded Software Programmed in C MPLABX IDE XC16 compiler Cyclic Executive 7 IMAGE OF COMPLETE SYSTEM

Review Purpose Design Considerations Design Hardware Software Implementation 8

Acknowledgements Arizona Space Grant Consortium ERAU College of Engineering Dr. Gary Yale Dr. Brian Davis Davis Gomez Herrera Joskua Carrillo Jason Lathbury 9