MIPS Coding. Exercise – the bubble sort 7/9/2016week04-3.ppt2.

Slides:



Advertisements
Similar presentations
MIPS assembly. Review  Lat lecture, we learnt  addi,  and, andi, or, ori, xor, xori, nor,  beq, j, bne  An array is stored sequentially in the memory.
Advertisements

Branches Two branch instructions:
Arrays First step is to reserve sufficient space for the array.
The University of Adelaide, School of Computer Science
Lecture 20: 11/12/2002CS170 Fall CS170 Computer Organization and Architecture I Ayman Abdel-Hamid Department of Computer Science Old Dominion University.
CDA 3100 Recitation Week 8. Question 1.data A:.word 21,3,2,9,100,22,6,15,33,90.text.globl main main: la $a0, A li $a1, 17 li $a2, 10 jal funct li $v0,
Lecture 9: MIPS Instruction Set
CDA 3100 Recitation Week 15. What does the function f1 do:.data A:.word 10,21,45,8,100,15,29,12,3,19 B:.word 2,5,33,5,20,1,53,52,5,5 C:.word 6,8,5,4,5,22,53,12,33,89.text.globl.
CPS3340 COMPUTER ARCHITECTURE Fall Semester, /15/2013 Lecture 11: MIPS-Conditional Instructions Instructor: Ashraf Yaseen DEPARTMENT OF MATH & COMPUTER.
Comp Sci Control structures 1 Ch. 5 Control Structures.
MIPS Assembly Language CPSC 321 Computer Architecture Andreas Klappenecker.
Chapter 2 — Instructions: Language of the Computer — 1 Branching Far Away If branch target is too far to encode with 16-bit offset, assembler rewrites.
1 Lecture 4: Procedure Calls Today’s topics:  Procedure calls  Large constants  The compilation process Reminder: Assignment 1 is due on Thursday.
Assembly Code Example Selection Sort.
SPRING 2015 QtSpim Demo & Tutorial. 2 By DGP Outline How to write your own MIPS assembly language program How to use QtSpim simulator.
The University of Adelaide, School of Computer Science
Lecture 8: MIPS Instruction Set
MIPS Coding. Exercise – the bubble sort 5/8/2015week04-3.ppt2.
Comp Sci instruction encoding 1 Instruction Encoding MIPS machine language Binary encoding of instructions MIPS instruction = 32 bits Three instruction.
MIPS Assembly Language I Computer Architecture CPSC 321 Andreas Klappenecker.
Lecture 4: Loads, Logic, Loops. Review Memory is byte-addressable, but lw and sw access one word at a time. These instructions transfer the contents of.
More decisions and logic (1) Fall 2010 Lecture 4: Loads, Logic, Loops.
9/29: Lecture Topics Memory –Addressing (naming) –Address space sizing Data transfer instructions –load/store on arrays on arrays with variable indices.
MIPS function continued. Recursive functions So far, we have seen how to write – A simple function – A simple function that have to use the stack to save.
MIPS I/O and Interrupt. .data val1:.float 0.6 val2:.float 0.8 msg_done:.asciiz "done\n".text.globl main main: li.s $f0, mfc1 $a0, $f0 jal calsqrt.
In Class Execise. .data A:.word 0,1,2,3,4,5,6,7,8,9.text.globl main main: la $a0,A li $a1,6 li $a2,5 jal onUpStream done: li $v0, 10# exit syscall onUpStream:
Ch2b- 2 EE/CS/CPE Computer Organization  Seattle Pacific University Thanks for all the Memory! When 32 registers just won’t do. Many times (almost.
MIPS coding. Review Shifting – Shift Left Logical (sll) – Shift Right Logical (srl) – Moves all of the bits to the left/right and fills in gap with 0’s.
Chapter 2 Decision-Making Instructions (Instructions: Language of the Computer Part V)
Computer Organization CS224 Fall 2012 Lessons 7 and 8.
MIPS coding. slt, slti slt $t3, $t1, $t2 – set $t3 to be 1 if $t1 < $t2 ; else clear $t3 to be 0. – “Set Less Than.” slti $t3, $t1, 100 – set $t3 to be.
Pseudo instructions. MIPS supports pseudo instructions. We have seen some like – li $t0, 4 which set $t0 to 4. – la $t0, A which puts the address of label.
DR. SIMING LIU SPRING 2016 COMPUTER SCIENCE AND ENGINEERING UNIVERSITY OF NEVADA, RENO Session 11 Conditional Operations.
Control Structures Computer Organization I 1 October 2009 © McQuain, Feng & Ribbens Conditional Control Structure if ( i < j ) goto A; else.
CS2100 Computer Organization
CS2100 Computer Organisation
Lecture 7: MARS, Computer Arithmetic
MIPS Procedures.
MIPS Coding Continued.
Computer Architecture & Operations I
MIPS instructions.
Conditional Control Structure
Pseudo instructions.
The University of Adelaide, School of Computer Science
MIPS coding.
SPIM Syscalls.
MIPS Procedures.
CSCI206 - Computer Organization & Programming
Addressing in Jumps jump j Label go to Label op address 2 address
MIPS coding.
MIPS Functions.
Pseudo instructions.
Lecture 7: Examples, MARS, Arithmetic
MIPS Functions.
MIPS coding.
MIPS Procedures.
MIPS Coding.
The University of Adelaide, School of Computer Science
MIPS Functions.
MIPS Coding.
Review.
MIPS Coding Continued.
MIPS coding.
MIPS assembly.
9/27: Lecture Topics Memory Data transfer instructions
Conditional Control Structure
MIPS Functions.
MIPS instructions.
Conditional Branching (beq)
MIPS Assembly.
Presentation transcript:

MIPS Coding

Exercise – the bubble sort 7/9/2016week04-3.ppt2

Exercise – the bubble sort Need two loops – just encapsulate one in the other Need to read the elements – done before. Need to compare two numbers – done before Need to swap – not that hard

.data A:.word 12, 34, 67, 1, 45, 90, 11, 33, 67, 19.text.globl main main: la $s7, A# getting the address li $s6, 9 # N-1 li $s0, 0 # i = 0 LOOP1:addi $s0, $s0, 1# i = i + 1 bne $s0, $s6, LOOP1# if i != N-1, outer loop again done:li $v0,10 syscall Getting the first loop done

.data A:.word 12, 34, 67, 1, 45, 90, 11, 33, 67, 19.text.globl main main: la $s7, A# getting the address li $s6, 9 # N-1 li $s0, 0 # i = 0 LOOP1:li $s1, 0# j = 0 LOOP2:addi $s1, $s1, 1# j = j + 1 sub $t7, $s6, $s0# $t7 will get N-1-i bne $s1, $t7, LOOP2# if j != N-1-i, inner loop again addi $s0, $s0, 1# i = i + 1 bne $s0, $s6, LOOP1# if i != N-1, outer loop again done:li $v0,10 syscall Getting both loop done

.data A:.word 12, 34, 67, 1, 45, 90, 11, 33, 67, 19.text.globl main main: la $s7, A# getting the address li $s6, 9 # N-1 li $s0, 0 # i = 0 LOOP1:li $s1, 0# j = 0 LOOP2:sll $t0, $s1, 2# $t0 = j * 4 add $t0, $t0, $s7# $t0 is the address of A[j] lw $t1, 0($t0)# $t1 = A[j] lw $t2, 4($t0)# $t2 = A[j+1] addi $s1, $s1, 1# j = j + 1 sub $t7, $s6, $s0# $t7 will get N-1-i bne $s1, $t7, LOOP2# if j != N-1-i, inner loop again addi $s0, $s0, 1# i = i + 1 bne $s0, $s6, LOOP1# if i != N-1, outer loop again done:li $v0,10 syscall Adding the code to read the elements A[j] and A[j+1]

.data A:.word 12, 34, 67, 1, 45, 90, 11, 33, 67, 19.text.globl main main: la $s7, A# getting the address li $s6, 9 # N-1 li $s0, 0 # i = 0 LOOP1:li $s1, 0# j = 0 LOOP2:sll $t0, $s1, 2# $t0 = j * 4 add $t0, $t0, $s7# $t0 is the address of A[j] lw $t1, 0($t0)# $t1 = A[j] lw $t2, 4($t0)# $t2 = A[j+1] bgt $t1, $t2, L1# if A[j] > A[j+1] goto L1, bypass the swapping sw $t1,4($t0)# do the swap sw $t2,0($t0)# do the swap L1: addi $s1, $s1, 1# j = j + 1 sub $t7, $s6, $s0# $t7 will get N-1-i bne $s1, $t7, LOOP2# if j != N-1-i, inner loop again addi $s0, $s0, 1# i = i + 1 bne $s0, $s6, LOOP1# if i != N-1, outer loop again done:li $v0,10 syscall Adding the comparison and swapping

Pseudo instruction A pseudo instruction is not a real instruction supported by the hardware. It is created to make the coding easier. It is mapped to a unique sequence of real instructions by the assembler. We have seen some: li $s0, 0 # load immediate number, often mapped to ori. la $s7, A# load the address of label A into $s7 bgt $t1, $t2, L1 # branch if $t1 is greater than $t2. ``blt’’ also exits.

In-class exercise -- Loop