e- and h+ (with leakage current compensation up to ~2nA/pixel) Timepix vs Timepix3 Timepix (2006) Timepix3 (2013) Pixel arrangement 256 x 256 Pixel size 55 x 55 µm² Technology 250nm CMOS 130nm CMOS Acquisition modes 1) Charge (iTOT) 2) Time (TOA) 3) Event counting (PC) 1) Time (TOA) AND Charge (TOT) 3) Event counting (PC) AND integral charge (iTOT) Trigger-less Readout Type 1) Frame based 1) Data driven (DD) 2) Frame based (FB) Zero suppressed readout NO YES Dead time per pixel > 300 µs readout time of one frame > 475 ns Pulse measurement time + packet transfer time Minimum timing resolution 10 ns 1.562 ns TOT Energy resolution ~300-600 e-FWHM Minimum detectable charge >750 e- >500 e- Collection Polarity e- and h+ (with leakage current compensation up to ~2nA/pixel) Radiation hardness <250 krad Expected <200 Mrad (still to be measured)

Timepix (2006) Broad experience with different type of sensors: Si N-on-P, P-on-N (from 50um to 2mm thick) and edgeless CdTe with Ohmic and Schottky contacts (1mm) GaAs (500um) >350 paper citations >200 wafers produced (107 chips/wafer) Access to Timepix wafers possible Different readout systems available from the Medipix2 collaboration: Most versatile DAQ is FITPIX. USB interface from CTU Prague (http://www.widepix.cz)

Timepix3 (2013) Chip available since September 2013: Chip is fully functional Currently running the first wafer probing campaing prior bump-bonding to standard Si sensor (300 µm) Difficult availability to chips/wafers: Priority to cover the Medipix3 collaboration needs 12 wafers available (105 chips/wafer) Production run (48 wafers) to be ordered as soon as first Si assemblies validate the chip performance 3 readout DAQ under design: SPIDR (NIKHEF/CERN) 10 Gbps link FITPIX3 (Prague) USB 2.0 link MERLIN (Diamond, UK)

Frame based and zero-supressed readout Shutter Acquisition time Qin DataOut 48bit 48bit 48bit 48bit 48bit 0xA Address[16-bit] Data[28-bits] 0x71 0xA0 ChipID [32b] Data Packet (48 bits) End of Command (48 bits) Maximum frame rate: 1300 fps @5.12Gbps

Event-by-event data driven and zero-supressed readout Shutter Acquisition time Qin DataOut 48bit 48bit 48bit 48bit 48bit 48bit 0xB Address[16-bit] Data[28-bits] 0x71 0xB0 ChipID [32b] Data Packet (48 bits) End of Command (48 bits) Achievable count rate: uniformly distributed events → ~40 Mhits/s/cm2 @5.12Gbps Full matrix readout: ~800 µs @5.12Gbps

Pixel Operation in TOA & TOT Tpeak < 25ns Preamp Out Disc Out Clk (40MHz) Pixel Readout Starts (475ns→ 19 clock cycles) Global TOA (14-bit) 16384 2 3 4 16383 16382 1 FTOA (4 bits)=7 VCO Clk (640MHz) TOA (14-bit) 16383 X TOA (14 bits)=16383 TOT (10 bits) =4 TOT Clk (40MHz)

Pixel Operation in TOA only Tpeak < 25ns Preamp Out Disc Out Clk (40MHz) Pixel Readout Starts (475ns→ 19 clock cycles) Global TOA (14-bit) 16384 2 3 4 16383 16382 1 FTOA (4 bits)=7 VCO Clk (640MHz) TOA (14-bit) 16383 X TOA (14 bits)=16383

Pixel Operation in PC and iTOT Disc Out Preamp Out Pixel readout can start in Data Driven or Frame based Clk (40MHz) 3 PC (14 bits)=3 1 2 PC (10-bit) 5 iTOT (14 bits)=5 1 2 3 4 iTOT (14-bit) Shutter

Timepix3 Pixel Schematic VCO @640MHz Super pixel (Digital) Control voltage Common for 8 pixels 640MHz Front-end (Analog) Front-end (Digital) Counters & Latches clock (40MHz) Time stamp 14-bits Synchronizer Clock gating Leakage Current compensation Deserializer [1x31] Super pixel FIFO [2x31] Data out to EOC 37-bits clock (40MHz) Token arbitration 31-bits handshake TOA (14-bit) FTOA (4-bit) TOT (10-bit) TOA & TOT OP Mode TOA (14-bit) FTOA (4-bit) TOA Input pad 3fF iTOT (14-bit) PC (10-bit) PC & iTOT Preamp TestBit ~50mV/ke- MaskBit 3fF 4-bit Local Threshold TpA TpB Global threshold (LSB= ~10e-)

Timepix3 Floorplan

Timepix3 Active Periphery 64 VCO control voltage buffers VCO Buffer [0] VCO Buffer[2] VCO Buffer[63] Buffered bias voltages EoC[0] EoC[1] EoC[2] EoC[126] EoC[127] 128 End of Column logic VCO bias 640MHz Bus Controller 1260 µm Periphery bus (3.84Gbps) Analog Periphery Control Logic Slow Control & Command Decoder PLL 8x Serializer 8b10b DDR 1 BandGap 18 Global DACs E-Fuses 32 bits Clk40 Data output DDR 8b10b encoding (1 to 8 links) Up to 8x640 Mbps (5.12 Gbps)

Timepix3 Layout Analog Front-End: 13x55 μm2 Double column: Sensitive Area (14080 µm) Active Periphery (1260 µm) Pad extenders (870 µm) Analog Front-End: 13x55 μm2 <25% pixel area 55 µm Super Pixel (SP): 2x4 pixels 110x220 μm2 Double column: 2x256pixels 64 super pixels IO Pad on digital area: Careful shielding Pad is ½ of Timepix VCO (FTOA): 9.6x20 μm2 < 0.8% SP area Full Pixel Matrix: 256x256 pixels 128 double columns 8192 VCOs (640MHz) 177 Mtransistors Active Periphery Pad Extenders: Removed if TSV

Medipix chip family Clicpix (2013) Timepix3 (2013) Timepix (2006) Medipix3RX (2011) Medipix2 (1998) Medipix1 (1998)

Timepix3 readout → SPIDR (Nikhef) Speedy PIxel Detector Readout (SPIDR): Readout system for Medipix3 and Timepix3 (single upto quads) 1 x 10Gbps Ethernet link IO First chips available since beginning of September All measurements reported use data readout @640Mbps/link Timepix3 Chip 10 Gbit Ethernet Virtex 7 FPGA VC707 Evaluation Board 25th February 2014 ESE Seminar – X.Llopart

Timepix3 CERN PCBs Timepix3 CERN chip board Timepix3 Probe card Timepix3 translator FMC/VHDCI 25th February 2014 ESE Seminar – X.Llopart

250 Test Pulses in 1 pixel [Threshold scan in PC & iTOT mode, 1 pixel] ENC ~5.7 LSBrms = ~60 e- Assuming: Ctest=3fF → Tpulse=20e-/mV 25th February 2014 ESE Seminar – X.Llopart

Full Matrix ENC [Threshold scan over noise floor in PC & iTOT mode] 9 pixels not responding 15 pixels ENC > 80e- ENC matches predictions from simulations No significant digital coupling into analog FE 25th February 2014 ESE Seminar – X.Llopart

Pixel-to-pixel Threshold Equalization [Threshold scan over noise floor in PC & iTOT mode] µeq = 0e- σeq = 35e- µF = 762e- σF = 197e- Pixel DAC = 0x0 Pixel DAC = 0xF 25th February 2014 ESE Seminar – X.Llopart

Full chip minimum threshold [Equalized pixel matrix, 16 pixels masked] PC and iTOT ~400e- ENC of ~60e-rms TOA and TOT (VCO ON) ~500e- ENC of ~77e-rms 25th February 2014 ESE Seminar – X.Llopart

More information Timepix3 PH-ESE seminar to come Feb. 25: http://indico.cern.ch/event/267425/ Everybody welcome to join.