HyPPI The End or The Rebirth of MOORE’S LAW Shuai sun Volker sorger

Moore's Law Transistors double every 24 months. Transistors get smaller; power density stays constant. The cost of a chip fab doubles every 4 years. Robert Dennard Arthur Rock Gordon Moore — Moore’s Law — Dennard Scaling — Rock’s Law Slowing down recently Ends after 5nm when quantum and thermodynamic effects come in Clock frequency related Broke down in 2006 Speed domain scaling ends Hard to maintain transistor/fab cost system

Multicores −Clock speed stops growing −Demand for higher performance −Dark silicon (power, heat) Lithography −Cost reduction −Larger silicon wafers −Double/Triple/Quadruple patterning “35 Years of Microprocessor Trend Data”, M. Horowitz, F. Labonte, O. Shacham, K. Olukotun, L. Hammond, and C. Batten. Later. What we need: Novel interconnect options Post-Moore Era

 Diffraction Limited (>λ/2)  Large Footprint (μm 2 ～ mm 2 )  Low LMI → High Power (pJ)  No Diffraction Limit (< λ/2)  Area Efficient (nm 2 ～ μm 2 )  Energy Efficient (fJ) Hybrid  High On-chip Scaling  Footprint Reduced  Power Budget Friendly  Long Range Communication Photonics Plasmonics Scaling (Passive devices for Propagation)(Active devices for Manipulation)  Long Propagation (cm)  Short Propagation (μm) Photonics Plasmonics C. Ye, et al. “λ-size ITO and graphene-based electro-optic modulators on SOI,” IEEE J. Sel. Topics Quantum Electron, Novel Interconnect Options

High BFD Mid BFD low BFD Electrical Plasmonic Photonic HyPPI (this work) * BFD: Bit Flow Density [Gbps/um 2 ] Approach Analyze devices & waveguides options based on latency, energy efficiency, area and loss Simulate waveguide crosstalk and propagation length under different scaling Plug the best devices into interconnect options Results Hybrid Photonic Plasmonic Interconnects (HyPPIs) show the best potential 10× energy/bit, 100× latency and throughput improvement comparing with electrical links 1~3 orders higher Bit Flow Density Broader CLEAR range S. Sun, et al. "The Case for Hybrid Photonic Plasmonic Interconnects (HyPPIs): Low-Latency Energy-and-Area-Efficient On-Chip Interconnects”. IEEE Photonics Journal, Project Top view

2 kinds of HyPPI LaserModulator Detector Driver C.W. LaserDetector Driver HyPPI-Intrinsic: Source (Driver) Waveguide Detector HyPPI-Extrinsic: Source Waveguide Modulator Waveguide Detector

Point-to-point latency Energy Efficiency Link ThroughputEnergy Delay Product Results The electric capacitive delay hinders efficient links beyond 10’s of um distance. Electrical-optical break-even length at about um. Pure plasmonic solutions do not provide significant improvement over electronics and photonics. Pure photonic solution is more suitable for long range communication. Hybridization enables flat length scaling due to low loss photonic waveguide and robust data-size up scaling potential. Link Performance Shuai Sun, and Volker J. Sorger. "Photonic-Plasmonic Hybrid Interconnects: a Low-latency Energy and Footprint Efficient Link." Integrated Photonics Research, Silicon and Nanophotonics. OSA, 2015.

PlasmonicPhotonic HyPPI Extrinsic HyPPI Intrinsic Normalized BFD (Gbps/μm 2 ) Capability-to- Latency- Energy-Area Ratio (CLEAR) Bit Flow Density (BFD) Sun, Shuai, et al. "Low latency, area, and energy efficient Hybrid Photonic Plasmonic on-chip Interconnects (HyPPI)." SPIE OPTO. International Society for Optics and Photonics, 2016.

Takeaway Photonic IC Hard to be integrated Long propagation length Plasmonic IC Ultrafast Hard to propagate further Electrical IC The best for 20μm and shorter Performance ∝ Length -1 HyPPI The best for 20μm and longer Combine with Electrical to provide the best performance through the entire chip range

Proceedings ▪ Sun, Shuai, et al. "Low latency, area, and energy efficient Hybrid Photonic Plasmonic on-chip Interconnects (HyPPI)." SPIE OPTO. International Society for Optics and Photonics, ▪ Shuai Sun, et al. "Bit Flow Density (BFD): An Effective Performance FOM for Optical On-chip Interconnects." Laser Science to Photonic Applications (CLEO: 2016). (Submitted). ▪ Shuai Sun, and Volker J. Sorger. "Photonic-Plasmonic Hybrid Interconnects: a Low-latency Energy and Footprint Efficient Link." Integrated Photonics Research, Silicon and Nanophotonics. OSA, Patent ▪ Provisional U.S. Patent: “Hybrid Photonic Plasmonic Interconnects (HyPPI) with intrinsic and extrinsic modulation options.” S. Sun, V. J. Sorger, T. El- Ghazawi, V. Narayana, A.-H. Badawy (2015). Awards ▪ GW Research Days nd prize for Graduate Presenters in the area of Engineering ▪ SEAS 2016 R&D Showcase the 2 nd prize of the Theoretical Research Award ▪ SEAS 2016 R&D Showcase the 2 nd prize of the Entrepreneurship Award Journal ▪ Shuai Sun, et al. “The Case for Hybrid Photonic Plasmonic Interconnects (HyPPI): A low Latency, Energy and Area Efficient On-chip Interconnects”, IEEE Photonics Journal, Sep Related Works and Awards

Further info & Acknowledgement Universal on-chip FOM (CLEAR) Dynamic controlled hybrid networks Photonic Moore’s Law roadmap … OPEN Lab: sorger.seas.gwu.edusorger.seas.gwu.edu Check out our new website! Shuai SUN This project is supported by the Air Force Office of Scientific Research (AFOSR), award number FA PI: Tarek El-Ghazawi, CoPI: Volker Sorger, Vikram Narayana.