Date of download: 9/18/2016 Copyright © 2016 SPIE. All rights reserved. Schematic overview of impact of low-k1 on pattern fidelity. Figure Legend: From: Automated hot-spot fixing system applied to the metal layers of 65-nm logic devices J. Micro/Nanolith. MEMS MOEMS. 2007;6(3): doi: /
Date of download: 9/18/2016 Copyright © 2016 SPIE. All rights reserved. Flow chart of design methodology to fix hot spots using LCC. Figure Legend: From: Automated hot-spot fixing system applied to the metal layers of 65-nm logic devices J. Micro/Nanolith. MEMS MOEMS. 2007;6(3): doi: /
Date of download: 9/18/2016 Copyright © 2016 SPIE. All rights reserved. Schematic figure of necessity of automated hot-spot fixing tool at design stage in the flow. Figure Legend: From: Automated hot-spot fixing system applied to the metal layers of 65-nm logic devices J. Micro/Nanolith. MEMS MOEMS. 2007;6(3): doi: /
Date of download: 9/18/2016 Copyright © 2016 SPIE. All rights reserved. Hot-spot cleaning flow in cell design, chip design, and manufacturing. Figure Legend: From: Automated hot-spot fixing system applied to the metal layers of 65-nm logic devices J. Micro/Nanolith. MEMS MOEMS. 2007;6(3): doi: /
Date of download: 9/18/2016 Copyright © 2016 SPIE. All rights reserved. Flow chart of automated lithography compliance check (LCC) and hot-spot fixer (HSF) system. Figure Legend: From: Automated hot-spot fixing system applied to the metal layers of 65-nm logic devices J. Micro/Nanolith. MEMS MOEMS. 2007;6(3): doi: /
Date of download: 9/18/2016 Copyright © 2016 SPIE. All rights reserved. Schematic figure of modification rule in hot-spot fixer (HSF) system. Figure Legend: From: Automated hot-spot fixing system applied to the metal layers of 65-nm logic devices J. Micro/Nanolith. MEMS MOEMS. 2007;6(3): doi: /
Date of download: 9/18/2016 Copyright © 2016 SPIE. All rights reserved. Schematic figure of modification rule in hot-spot fixer (HSF) system. Figure Legend: From: Automated hot-spot fixing system applied to the metal layers of 65-nm logic devices J. Micro/Nanolith. MEMS MOEMS. 2007;6(3): doi: /
Date of download: 9/18/2016 Copyright © 2016 SPIE. All rights reserved. Schematic figure of multilayer modification example with HSF. Figure Legend: From: Automated hot-spot fixing system applied to the metal layers of 65-nm logic devices J. Micro/Nanolith. MEMS MOEMS. 2007;6(3): doi: /
Date of download: 9/18/2016 Copyright © 2016 SPIE. All rights reserved. Schematic figure of multilayer pattern pitch modification example with HSF. Figure Legend: From: Automated hot-spot fixing system applied to the metal layers of 65-nm logic devices J. Micro/Nanolith. MEMS MOEMS. 2007;6(3): doi: /
Date of download: 9/18/2016 Copyright © 2016 SPIE. All rights reserved. Example of tunable items in HSF. Figure Legend: From: Automated hot-spot fixing system applied to the metal layers of 65-nm logic devices J. Micro/Nanolith. MEMS MOEMS. 2007;6(3): doi: /
Date of download: 9/18/2016 Copyright © 2016 SPIE. All rights reserved. Example of expanding process margin in random logic pattern. Figure Legend: From: Automated hot-spot fixing system applied to the metal layers of 65-nm logic devices J. Micro/Nanolith. MEMS MOEMS. 2007;6(3): doi: /
Date of download: 9/18/2016 Copyright © 2016 SPIE. All rights reserved. Example of expanding lithography process window in random logic pattern. Figure Legend: From: Automated hot-spot fixing system applied to the metal layers of 65-nm logic devices J. Micro/Nanolith. MEMS MOEMS. 2007;6(3): doi: /
Date of download: 9/18/2016 Copyright © 2016 SPIE. All rights reserved. Map of the hot spots before and after full-chip application of automated hot-spot fixing system and the summarized results. In the map, each small spot indicates an individual hot spot. Hot spots are induced under accelerated dose error. Figure Legend: From: Automated hot-spot fixing system applied to the metal layers of 65-nm logic devices J. Micro/Nanolith. MEMS MOEMS. 2007;6(3): doi: /