G.H.PATEL COLLEGE OF ENGG.& TECH. SUBJECT:-Micro processor & controller GUIDED BY :-Bhavesh R hindocha PREPARED BY:- PARTH TRIVEDI( ) AJAY KATHIRIYA( ) PRASHANT KOLADIYA( )

Pin function of 8085 The 8085A is an 8 bit general purpose microprocessor having 40 pins and work on single power supply.

Sr.nosignalspins 1Power supply signalsV cc, V ss 2Clock signalsX 1, X 2, CLK OUT 3Reset signals(RESETIN)’, REST OUT 4Interrupt signalsTrap,restart interrupts,INTR, (INTA)’ 5Adress bus and data bus Adress bus, multiplexed adress/data bus

Sr.nosignalspins 6Status signals and control signals Adress latch enable, input output/memory, status signals,read,write,ready 7Series input/output signals HOLD,HLDA 8DMA request signalsSID(Serial input data), SOD(serial output data)

Power supply signals:- V cc V ss V cc is to be connected to +5V power supply. V ss ground reference.

Clock signal X1X2X1X2 CLKOUT (1) X 1 X 2 :-  These are clock input signals, connected to crystal LC or RC network. The crystal, LC or RC is connected between this two pins.  The frequancy is devided by 2 and used as operating frequancy. Generally the 6.014MHZ crystal is connected to X 1 and X 2, this is divided by 2. so the operating frequancy of 8085 is 3.07MHZ.

(2) CLKOUT:-  This is an output signal, used as a system clock.  The internal operating frequancy is availabale on CLOCKOUT pin. Its frequancy is half of the oscillator frequancy.  This pin can be used by the periphearls as a system clock input for their operation. Hence, there will be synchronization between the different periphearls and the microprocessor.

Reset signals :- (RESETIN)’RESETOUT (1)(RESETIN)’:-  This is an active low, input reset signal when (RESETIN)’ =0, it clears programcounter i.e. 0000and makes adress, data and control line tristated. After reset the status of internal register and flags are unpredictable. The instruction register is reset. Half flip-flop is reset.  The CPU is held in the reset condition as long as (RESETIN)’ is applied. (2). RESET OUT:-  This is an active high, output signal used to indicate that the microprocessor is reset.  This signal is used as system reset, to reset other devices connected in system.

Interrupt signals:- TRAPRestart interrupts INTR(INTA)’ (1)TRAP:-  This is an active high level and edge triggered,non maskable,vectored highest priority interrupt.  When TRAP line is active microprocessor performs internal restart automatically at vector address 0024H. (2) Restart interrupts:-  These are active high, level triggered, vectored, maskable interrupt. They cause an internal restart to be automatically inserted.  The properties of these are RST 7.5,RST 6.5,RST 5.5.

(3)INTR:-  These are active high, level triggered, general purpose, non-vectored interrupt.  It has lowest priority.  Whenever a device requires a service it has to request service on this pin by meaking it’s logic “1”. (4)(INTA)’:-  It is an output signal.  (INTA)’ is used to indicate that the microprocessor has received an INTR intrrupt.

Adress bus and data bus:- Adress busMultiplexed address/ data bus (1)Address bus :-  These are output, tristate signals used as higher order 8 bits of 16 bit address.  The adress bus is always unidirectional meaning that the address is given by 8085 to select a memory or I/O location.  It is used to identify a memory location or a peripheral device

(2) Multiplexed address/data bus:-  These are input/output, tristate signals having two set of signals, they are address and data.  The lower order 8 bits, of 16 bits address is multiplexed or time shared with data bus.  They are demultiplexed with the help of ALE signal. During the earlier part it is used lower order address and in later part it is used as data bus.  The address and data buses are multiplexed inorder reduce the number of pins of the chip. This is the main advantage of multiolexed bus.  The disadvantage is that for demultiplexing the address and data bus we need a separate IC.

Status and control signals Address latch enableInput output /memory Status signalsRead WriteReady

(1) Address latch enable:- This is an output signal,used to give information of AD0 AD7 contents. When pulse is high it indicates that the contenys of AD0 AD7 are address.when it is low it indicates that contents are data. the ALE signal is used to seprate AD0-AD7 to A0-A7 and D0-D7.To do this operation an external latch is connected to AD0-AD7 lines and this latch is controlled by ALE signal.

(2) Input output / memory This is an output status signal, used to give information of operation to be perfomed with memory. If IO/M=0, microprocessor is performing a memory related operation. If IO/M=1 the microprocessor is performing an I/O device related operation. This signal is combined with RD and WR to generate I/O and memory control signals.

(3)Satus signal (S1 and S0) These are output status signals used to give information of operation perfomed by microprocessor. When S0 and S1 is combined with IO/M we get status of all the machine cycles perfomed by 8085 as shown in table.

ioS1S0Operation Memory write 010Memory read 011Opcodde fetch I/O write 110I/O read 111Interrupt acknowldedge Z00Halt ZXXHold ZXXReset

(4) READ This is an active low signal. It is an output control signal used to read data from the selected memory location. A low on this pin indicates that operation perfomed is a read operation.

(5) WRITE This is an active low signal. It is an output signal used to write data to selected memory location. A low on this pin indicates that a operation perfomed is a write operation.

(6)READY This is an active high input control signal. The main function of this pin is to synchronize the microprocessor 8085 with slower peripherals. i. e. the microprocessor waits till the peripherals is not ready to send data.

DMA request signal HOLD and HLDA HOLD is an active high, input signal used by other controller to request microprocessor about use of addres, Data and control signal. HOLD and HLDA signals are used for direct memory access (DMA) The DMA controller receives a request from a device and In turn issues the HOLD signal to microprocessor.

SERIAL I/O SIGNAL (1)SID(serial input data) This is an active high sreial input port pin, used to accept serial 1 bit data under s/w control. When a RIM instruction is executed the SID pin is loaded in bit D7 of accumulator. (2)SOD(serial output data) This is an active high sreial output port pin, used to transfer serial 1 bit data under s/w control. When a SIM instruction is executed the SOD pin is loaded in bit D7 and D6 of accumulator.