Overview AvrEmbedded128_Pro RTLab. 김태현

Atmega128 Features High-performance, Low-power AVR® 8-bit Microcontroller advanced RISC Architecture – 133 Powerful Instructions – Most Single Clock Cycle Execution – 32 x 8 General Purpose Working Registers + Peripheral Control Registers – Up to 16 MIPS Throughput at 16 MHz – On-chip 2-cycle Multiplier Nonvolatile Program and Data Memories – 128K Bytes of In-System Reprogrammable Flash – 4K Bytes EEPROM -4K Bytes Internal SRAM Peripheral Features -Two 8-bit Timer/Counters, Two Expanded 16-bit Timer/Counters – 8-channel, 10-bit ADC – Dual Programmable Serial USARTs

Atmega128 Features (Cont’) I/O and Packages – 53 Programmable I/O Lines Operating Voltages – V for ATmega128L – V for ATmega128 Speed Grades – MHz for ATmega128L – MHz for ATmega128

Atmega128 Pin Out

AvrEmbedded128 Layout

Graphic LCD Test

Remocon Test

Key Test

ADC Test

Uart0, 1 Test

Seminar plan AVR Seminar. -Memory : 이근오 -Architecture and functionality : 김현두 -Sample Programming : 김태현 -Tiny OS Porting : 전대돈 - June 29 ~ July 6