Relative crate phase measurement Olivier Deschamps Jacques Lefrançois Frédéric Machefert Stéphane T'Jampens Frédéric Machefert – Calorimeter Meeting

Wednesday 21st, 2011Frédéric Machefert – Calorimeter Meeting2 Introduction Time phase shifts have been observed in the past The amplitude of the shift was up to ~ 2 ns This was seen on 2 crates after the latest winter shutdown This effect Was measured with beams (particles) Can potentially affect the system (mainly the trigger) Exchange between crates have to be properly time adjusted Is not understood Some hypothesis are Shift appears somewhere on the fiber path (patch panel, source of the signal) Dust on the TTCrq fiber connector The TTCrq mezzanine A component on the CROC Try to develop a cheap system to measure the relative phase between the crates (Marie-Noëlle)

Wednesday 21st, 2011Frédéric Machefert – Calorimeter Meeting3 The system The FEB can measure integrals 2 overlapping clocks (coincidence) may be integrated with our FEB Idea consists in Having a clock from each crate to be measured Having a reference signal Provided by a crate -> synchrone with one of the clocks to be measured Has a lower repetition rate than a clock Coincidence would be a low repetition rate square signal Surface is constant if no phase shift Surface depends on the phase between The clocks from the crates The reference signal Requires an extension of the FEB Receives 22 clock signals (PRS, ECAL, no HCAL) Perform the coincidence with the reference Reference would be the calibration pulses Phase measurements are performed altogether with the LED pulsing FEB Extensio n Calibration (Integration coincidence ) 22 crate inputs After- coincidence Signal to be integrated

Wednesday 21st, 2011Frédéric Machefert – Calorimeter Meeting4 Coincidence and measured signal Referenc e Crate A Crate B

Wednesday 21st, 2011Frédéric Machefert – Calorimeter Meeting5 What is measured

Wednesday 21st, 2011Frédéric Machefert – Calorimeter Meeting6 Installation and integration to the acquisition The boards have installed during the latest TS 2 FEB 1 per side 1 FEB deals with 4 PRS 7 ECAL crates The clock signal cables have been attached (as neatly as I could... I am not an expert !) and their length have been adjusted so that the integrated signal is in the middle of the allowed range We have a « safe » +/- 3ns range of measurement around the present value The reference signal is the calibration pulse The L0 used to acquire the pin-diode is used here to acquire the « integrated coincidence » This required an adjustment of the latency in the FEB CROC and TELL1 (Stéphane) channels for the 2 FEBs have been enabled Olivier adapted the software New FEB are not in the physics path On the fly building of histograms Integrated signal amplitude RMS of the signal Trending Now integrated in the presenter : Calorimeters -> Ecal -> Crate Timing

Wednesday 21st, 2011Frédéric Machefert – Calorimeter Meeting7 How it looks like : not very nice... RM S Trendin g Signa l 2 regimes : collisions (L0) - no collisions (no L0) Difference ~ [75, 200] ADC, [0.25,0.75] ns 1ns ~ 280 ADC counts Noise is multiplied by a large factor Value (no L0) corresponds exactly to post-installation meas.

Wednesday 21st, 2011Frédéric Machefert – Calorimeter Meeting8... and this can be worst (crate 19) Some « extra-features » : ● Peaks : detector throttling, run change, re-configuration -> most probably ok ● 2 regimes appear when not in stable beam ● Undefined state (no beam), Internal/external clock,... ?

Wednesday 21st, 2011Frédéric Machefert – Calorimeter Meeting9 Discussion (I) Recall : A single phase shift would be noticed by A SINGLE measurement affected -> clock not from the crate with the reference ALL measurements BUT ONE -> reference and corresponding crate shifted Still a lot to understand L0/no L0 regimes (probably the worst problem) ALL crates are affected Also the clock which is measured in the SAME crate as the reference This first led to the conclusion that the problem affects only the clocks Not the reference NIM, FPGA output of the CROC ? Difficult to see how this would be linked to the L0 rate FPGA is a APA: remember that this caused problems at high rate ! Idea (Jacques) : the problem could be caused by the REFERENCE This would explain what is observed Calibration pulse (produced in the Sequencer) would be affected Sequencer receives the L0 data from the 8 Fe-PGA -> L0 rate Sequencer is an APA Idea can be tested at LAL on a test bench – difficult to cure System can still be used but with 2 reference values for the « default behaviour »

Wednesday 21st, 2011Frédéric Machefert – Calorimeter Meeting10 Discussion (II) Other problems : Understanding would require to know the state of the detector During physics -> mostly ok Shift leader / big brother writes state in the logbook This permits to see throttling, run change, etc... While there is no physics it seems that Configuration, resets, de-allocation, LHC(b) clock used, etc... affect the measurements harmless, but we would like to understand Short term survey Automatized alarm on the trending not feasible Anyway, this is not really wished looking at the trending curves ! Could we imagine (Benoît, Olivier) Define a range around the « nominal ADC count » 0.3 ns ~ 85 ADC count Once in physics, measurement is ~ stable (but for throttling, run change) Define it for physics period ONLY Provide a message to the piquet if ADC count out of range for more than x minutes