Current Monitor Group (1606) Maya Dubrow Barath Parthasarathy Andrew Pikul Jason Stock.

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Current Monitor Group (1606) Maya Dubrow Barath Parthasarathy Andrew Pikul Jason Stock

Executive Summary System Breakdown Characterization and Data Timeline Outline Executive Summary: We’ve designed a ranging HIGH-SIDE current monitor, which attaches directly to their DC supply. We use a low-resistance sense resistor and amplifier to measure the sense voltage drop. We’ve begun characterization of this circuit on a mix of breadboard and PCB. Printed/No Lead board would mean better components. No one would be impressed, but we could turn in what we have and meet the bare minimum requirements. The company wants software too.

System Breakdown Sensing Circuit [Group] Built! Ranging Circuit [Group] Built! Signal Postprocess (Analog) [Maya, Jason] Designed (Digital) [AJ] Done Microcontroller (Controls All ICs) [AJ] In Design Power Circuits [Barath] Designed

Sensing Circuit Amplifier: LTC6101 Amplifies signal to be used for output. 3 separate op amps are used to reduce error caused by FET impedance. Trimmer’s will be used to correct gain variability. Resistors from Vishay and Ohmite Very low thermal coefficients High power rating

Ranging Circuit Optoisolators: P227G Mosfet: BUK Mux: MAX 7368 Analog 2x 4:1 multiplexer 100 kHz bandwidth Supply voltage 3.3V

Second Stage Gain ADG704 Analog 1x 4:1 multiplexer Large bandwidth (MHz) Supply voltage 3.3V OPA1612 Max supply voltage 36 V Bandwidth of 40 MHz at G=1 Low input offset voltage and current Low common mode voltage of +/-2V

Aliasing & Anti-Aliasing Aliasing is a phenomenon of sampled data filters which causes two signals to become indistinguishable from one another due to overlapping It can occur when a signal is sampled insufficiently Anti-Aliasing is a common practice using an anti-aliasing filter to limit, or restrict the bandwidth to that of the Nyquist limit.

Antialiasing Filter ● Approached the problem in a few different manners ● LTC1564 ○ Digitally controlled antialiasing filter ○ Adjustable cutoff frequency from 10kHz to 150kHz in steps of 10kHz ● The sampling frequency for our DAQ is 48kHz, so our cutoff frequency should be roughly 24kHz. ● Using this filter would be problematic because we would have to use either 20kHz or 30kHz, so there would be some insufficient sampling rates. ● MAX274 ○ 8th order continuous time filter ○ Can be configured in bessel, butterworth, and chebyshev models ○ Main drawback is that this seemed like a really unorganized design that would cause a lot of confusions during the implementation process.

TI’s Webench Ended up designing a 5th-order bessel filter from scratch using TI’s Webench software.

LTC1065 After a bit of research, we ended up finding a 5th order Bessel filter IC. This helps immensely, and cuts down on implementation time. LTC1065 Antialiasing filter with linear phase response Operates from +/ V to +/-8.0V Closely approximates a 5th order Bessel polynomial Maximum cutoff frequency of 50kHz (controlled by an internal or external clock) An input RC circuit can be used to attenuate incoming signals close to the filter clock frequency Choosing the R value according to Table 1, will keep the Bessel passband response constant Using an input signal whose frequency is in the range of fCLK +/-6% an alias signal will be generated into the filter’s passband and stopband. 100:1 clock-to-cutoff frequency ratio

LTC1065 Schematic & Tables

Digital Potentiometer The LTC1065 will benefit from having a digital potentiometer in place of the input resistance, Rin. This will allow Phonon to generate different sample rates of the Bessel filter based on a table in the LTC’s datasheet X9111 Potentiometer 1024 resistance taps 10-bit resolution Maximum resistance of 100k Ω V operating voltage Wiper resistance of 40 Ω typical at 5V

Controller 4 GPIO for 3 multiplexers (range and gain) 4 GPIO for serial to DAQ 3 for possible auto ranging (comparator detection) 3 for SPI to Filter 1 for Clock to Filter Total: 15 I/O… we can use a ATmega328P! (power up/power down behavior is very important)

DAQ (USB → Computer) Company Device 8 analog in (or 4 differential) f s = (48 kHz / #channels) 16 GPIO (Software Polled).NET Driver (VB Requested) Software Can do a voltage sweep with the DC Supply Collects Data and Displays Exports to Excel

Collected Data for 15 ohm DUT Blue- 0.1Ω R sense Red- 0.25Ω R sense Green- 0.5Ω R sense Data was collected for 6 other DUTs: 49Ω, 100Ω, 200Ω, 500Ω, 1.2kΩ, 2.5kΩ.

Analysis

Power Circuits Sense amplifier is self powered! 3.3 Volts for IC 24 Volts for 2nd Stage Gain (Post Processing) Gate Driver

Voltage Regulator Required to power extra components to precise voltages ( Mux, Anti-aliasing, opto- isolators, amplifier etc.) LM317 (3.3 V regulator) (2 V dropout) UM7824 (24 V regulator) (2 V dropout) This regulator is used specifically for the 2nd stage gain. P(wasted)=(Vin-Vout)*Iout The larger the power, the more we need a heat sink. Ensure Stability of output voltage

Gate Driver LTC1910 Responsible for detecting a current overload within the LTC6101. The devices turns off in harsh environments. This time can be adjusted by the capacitance on pin 2 (150,000*C=T(delay)) Example:.33uF resistor gives us 50ms termination