Challenges in making WiFi Chips

Access Point – Connects to Internet and provides Wireless Access to Devices including Smart phones, Tabs, Laptops INTERNET ACCESS POINT MOBILE PHONES LAPTOPS TABLETS Wireless Connectivity

WiFi Access Points vs Clients Access Points Standalone – CPU, memory, Ethernet, USB and other interfaces Always ON – doesn’t go to sleep No constraint on the form-factor Uses high gain antennas (dipoles) for good range/coverage. Use high power PAs for better range/coverage. Clients Laptops, Tabs, Mobiles, … Low power features – go to sleep when no activity Interfaces includes PCIe, USB, SDIO Host offload

TX RX TX/RX Blocks in WiFi Chip LO

Key WiFi Metrics Transmit Performance Output Power Spectral Mask EVM Receive Performance RX sensitivity System Performance Conducted and Radiated Throughput across the range FCC ModulationCoding Rate Minimum Sensitivity Level (dBm) 20 MHz40 MHz80 MHz BPSK1/ QAM5/ QAM 5/

Transmit Spectral Mask

Transmit EVM (Error Vector Magnitude)

WiFi AP SoC

Challenges on AP SoC WiFi Performance is impacted by the increased complexity of the AP SoC. Non-WiFi interfaces of AP SoC/Board impacts WiFi Performance. APs typically use high gain stick/dipole Antennas Any Noise/Emissions on the board is picked up by the Antenna causing the Noise Floor to elevate. This will impact the Receive Sensitivity. Reference Clock coupling into RF (either inside the Chip or in the Board) causing Spurs – Impacts Receive Sensitivity DDR Clock and PCIe Ref Clock harmonics impacting RX sensitivity Emissions from high speed interfaces/connectors – specifically USB 3.0 and PCIE Gen2 which are very common in the AP designs. Supply Noise caused by high speed switching in the board – Increases Jitter, Phase noise. Low cost Low layer count PCBs are extremely challenging. FCC/EMI concerns. Above Challenges can be effectively mitigated in both Chip and Board.

DemandsChallenges Higher data rates => 64 QAM (802.11n) -> 256 QAM (802.11ac) -> 1024 QAM (802.11ax) EVM requirement becomes very tight (complexity increases in the Chip and System Design). Advanced features including Beam-forming, MU- MIMO, Multi-Stream/Chains, 160MHz bandwidth, etc… Tight EVM requirements, Spectral flatness across very wide-band of 80/160 MHz Higher the streams => more Antennas High System/Solution Performance Higher TX power output – better range/coverage. High Processing power, Host offload System Design complexity increases. Higher Power Consumption Thermal challenges Low Cost (Silicon as well as Solution cost) High levels of integration (SoC) WiFi SoC for Access Point includes high speed CPU & memory interfaces, high speed I/Os including PCIe 2.0, USB 3.0, etc… apart from WiFi Cores including MAC, PHY, RF Lower BOM. High level of Integration and at low cost invariably cause RF impairments => impacts performance. WiFi Demands & Challenges

Summary High level of Integration invariably cause RF impairments. Coupling, Jitter, Supply Noise impacting system performance. Clock Spurs, Harmonics, Phase noise degradation – impacting RF/System performance and FCC/EMI. With Increasing demands and complexity, overall system performance has become more sensitive to RF impairments. Few Examples: IQ Quadrature imbalance, Noise degrading TX EVM Power Amplifier Distortion – impacts the Transmit power for higher modulation Gain flatness across wide bands of 80/160 MHz. Power consumption and Thermal issues. All these impairments can be simulated and corrected in the PHY/Baseband