MIPS Microarchitecture Single-Cycle Processor Control

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Presentation transcript:

MIPS Microarchitecture Single-Cycle Processor Control Lecture 18 Digital Design and Computer Architecture Harris & Harris Morgan Kaufmann / Elsevier, 2007

Review: Single-Cycle Datapath

Review: ALU F2:0 Function 000 A & B 001 A | B 010 A + B 011 not used 100 101 A | ~B 110 A - B 111 SLT

Review: ALU

Single-Cycle Control

Single-Cycle Control

Single-Cycle Control

Single-Cycle Control

Control Units

Control Units: ALU Decoder ALUOp Meaning 00 Add 01 Subtract 10 Look at funct 11 Not Used ALUOp Funct ALUControl 00 X 010 (Add) X1 110 (Subtract) 1X 100000 (add) 100010 (sub) 100100 (and) 000 (And) 100101 (or) 001 (Or) 101010 (slt) 111 (SLT)

Control Units: Main Decoder Instruction Op5:0 RegWrite RegDst AluSrc Branch MemWrite MemtoReg ALUOp1:0 R-type 000000 lw 100011 sw 101011 beq 000100

Extended Functionality: addi

Extended Functionality: j

Performance How fast is the single-cycle processor?

Performance

Next Time Multicycle processor

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