1 Lecture #15 EGR 277 – Digital Logic Reading Assignment: Chapter 5 in Digital Design, 3 rd Edition by Mano Example: (Problem 5-17 from Digital Design,

Slides:



Advertisements
Similar presentations
التصميم المنطقي Second Course
Advertisements

Lecture #9 EGR 277 – Digital Logic
Sequential Circuits1 DIGITAL LOGIC DESIGN by Dr. Fenghui Yao Tennessee State University Department of Computer Science Nashville, TN.
SYEN 3330 Digital SystemsJung H. Kim 1 SYEN 3330 Digital Systems Chapter 6 – Part 1.
CPEN Digital System Design Chapter 5 Sequential Circuits Storage Elements and Sequential Circuit Analysis C. Gerousis © Logic and Computer Design.
CS 151 Digital Systems Design Lecture 21 Analyzing Sequential Circuits.
Sequential Logic Design with Flip-flops
Registers.1. Register  Consists of N Flip-Flops  Stores N bits  Common clock used for all Flip-Flops Shift Register  A register that provides the.
ECE 331 – Digital System Design Introduction to and Analysis of Sequential Logic Circuits (Lecture #20) The slides included herein were taken from the.
Chapter 8 -- Analysis and Synthesis of Synchronous Sequential Circuits.
Sequential Circuits Problems(I) Prof. Sin-Min Lee Department of Mathematics and Computer Science Algorithm = Logic + Control.
ECE 331 – Digital System Design Counters (Lecture #18)
ECE 331 – Digital System Design Counters (Lecture #19) The slides included herein were taken from the materials accompanying Fundamentals of Logic Design,
ECE 331 – Digital System Design Sequential Circuit Design (Lecture #23) The slides included herein were taken from the materials accompanying Fundamentals.
ECE 301 – Digital Electronics Introduction to Sequential Logic Circuits (aka. Finite State Machines) and FSM Analysis (Lecture #17)
ECE 331 – Digital Systems Design Introduction to Sequential Logic Circuits (aka. Finite State Machines) and FSM Analysis (Lecture #19)
1 Synchronous Sequential Circuit Analysis. 2 Synchronous Sequential Circuit State Memory – A set of n edge-triggered flip-flops that store the current.
Overview Part 1 - Storage Elements and Sequential Circuit Analysis
Sequential logic and systems
Registers and Counters
MOHD. YAMANI IDRIS/ NOORZAILY MOHAMED NOOR1 Sequential Circuit Design.
ECE/CS 352 Digital System Fundamentals© T. Kaminski & C. Kime 1 ECE/CS 352 Digital Systems Fundamentals Spring 2001 Chapter 4 – Part 3 Tom Kaminski & Charles.
ECE 320 Homework #6 Derive the state table and state diagram of the sequential circuit of the Figure below. What is the function of the circuit? A’ A.
IKI c-Synthesis of Sequential Logic Bobby Nazief Semester-I The materials on these slides are adopted from: Prof. Daniel Gajski’s transparency.
ECE 331 – Digital Systems Design Sequential Logic Circuits: FSM Design (Lecture #20)
Chapter 5 - Part Sequential Circuit Design Design Procedure  Specification  Formulation - Obtain a state diagram or state table  State Assignment.
Analyzing our example circuit
T Flip-Flop A T (toggle) flip-flop is a complementing flip-flop and can be obtained from a JK flip-flop when the two inputs are tied together. When T =
Digital Design Lecture 10 Sequential Design. State Reduction Equivalent Circuits –Identical input sequence –Identical output sequence Equivalent States.
Chap 4. Sequential Circuits
Lecture 7 Topics –Boolean Algebra 1. Logic and Bits Operation Computers represent information by bit A bit has two possible values, namely zero and one.
1 Boolean Algebra & Logic Gates. 2 Objectives Understand the relationship between Boolean logic and digital computer circuits. Learn how to design simple.
1 Lecture #7 EGR 277 – Digital Logic Reading Assignment: Chapter 4 in Digital Design, 3 rd Edition by Mano Chapter 4 – Combinational Logic Circuits A)
Sequential Circuits. Two primary differences between combinational circuits and sequential circuits –Sequential circuits are synchronous (use a clock)
Chapter 8 -- Analysis and Synthesis of Synchronous Sequential Circuits.
1 Lecture #12 EGR 277 – Digital Logic Synchronous Logic Circuits versus Combinational Logic Circuits A) Combinational Logic Circuits Recall that there.
1 Lecture 22 Sequential Circuits Analysis. 2 Combinational vs. Sequential  Combinational Logic Circuit  Output is a function only of the present inputs.
1 Lecture #17 EGR 277 – Digital Logic Reading Assignment: Chapter 6 in Digital Design, 3 rd Edition by Mano Timing Sequences So far we have designed circuits.
ACOE1611 Combinational Logic Circuits Reference: M. Mano, C. Kime, “Logic and Computer Design Fundamentals”, Chapter 2.
Synchronous Counters Synchronous digital counters have a common clock which results in all the flip-flops being triggered simultaneously. Consequently,
9/15/09 - L24 Other FF TypesCopyright Joanne DeGroat, ECE, OSU1 Other FF Types.
Other Flip-Flop Types: J-K and T flip-flops (Section 5-6)
1 Lecture #11 EGR 277 – Digital Logic Ch. 5 - Synchronous Sequential Logic There are two primary classifications of logic circuits: 1.Combinational logic.
1 State Reduction Goal: reduce the number of states while keeping the external input-output requirements unchanged. State reduction example: a: input 0.
Chapter 8 -- Analysis and Synthesis of Synchronous Sequential Circuits.
Sahar Mosleh PageCalifornia State University San Marcos 1 More on Flip Flop State Table and State Diagram.
© 2009 Pearson Education, Upper Saddle River, NJ All Rights ReservedFloyd, Digital Fundamentals, 10 th ed Digital Logic Design Dr. Oliver Faust.
IKI b-Analysis of Sequential Logic Bobby Nazief Semester-I The materials on these slides are adopted from: CS231’s Lecture Notes at.
Sequential circuit analysis1 Sequential Circuit Analysis Last time we started talking about latches and flip-flops, which are basic one-bit memory units.
1 Lecture #13 EGR 277 – Digital Logic Sequential Counters Counters are an important class of sequential circuits. Counters follow a predetermined sequence.
1 Lecture #14 EGR 277 – Digital Logic Self-starting counters Counters are considered to be self-starting if all unused counts eventually lead to the correct.
Materials on the Exam Introduction Data Representation in Computer Systems Boolean Algebra Digital Logic MARIE: An Introduction to a Simple Computer Until.
Digital Design: With an Introduction to the Verilog HDL, 5e M. Morris Mano Michael D. Ciletti Copyright ©2013 by Pearson Education, Inc. All rights reserved.
ANALYSIS OF SEQUENTIAL CIRCUITS
FIGURE 5.1 Block diagram of sequential circuit
Digital Design Lecture 9
Dr. Clincy Professor of CS
ECE 301 – Digital Electronics
T Flip-Flop A T (toggle) flip-flop is a complementing flip-flop and can be obtained from a JK flip-flop when the two inputs are tied together. When T.
Princess Sumaya University
Boolean Algebra and Digital Logic
Schematics 201 Lecture Topic: Electrical Symbols
Instructor: Alexander Stoytchev
Reference: Chapter 5 Sequential Circuits Moris Mano 4th Ediditon
MTE 202, Summer 2016 Digital Circuits Dr.-Ing. Saleh Hussin
DESIGN OF SEQUENTIAL CIRCUITS
EGC 442 Introduction to Computer Architecture
Sequential Circuit Analysis
Chapter5: Synchronous Sequential Logic – Part 3
Presentation transcript:

1 Lecture #15 EGR 277 – Digital Logic Reading Assignment: Chapter 5 in Digital Design, 3 rd Edition by Mano Example: (Problem 5-17 from Digital Design, 3 rd Edition, by Mano) Design a one input, one output serial 2’s complementer. The circuit accepts a string of bits from the input and generates the 2’s complement at the output. The circuit can be reset asynchronously to start and stop the operation.

2 Lecture #15 EGR 277 – Digital Logic Recall that there are two methods covered in Chapter 5 for designing sequential circuits: 1) Excitation table method (already covered) 2) State equation method Before the state equation method is covered, two related topics must be covered: state equations flip-flop characteristic equations State Equations A state equation is an equation for the next state of a flip-flop. It has the form: Q(t + 1) = (Boolean expression involving present states and inputs) The state equations are simply formed using the “Next State” shown in the state table.

3 Lecture #15 EGR 277 – Digital Logic Example: Find the state equations for the state diagram shown below

4 Lecture #15 EGR 277 – Digital Logic Flip-flop characteristic equations Flip-flop behavior has been expressed so far using truth tables or excitation tables. The next state (output) of a flip-flop can also be described algebraically using a flip-flop state equation or flip-flop characteristic equation. Example: Develop the flip-flop characteristic equation for a JK flip-flop.

5 Lecture #15 EGR 277 – Digital Logic Example: Develop flip-flop characteristic equations for SR, D, and T flip-flops.

6 Lecture #15 EGR 277 – Digital Logic Designing Sequential Circuits using State Equations – Procedure 1.Form the state table. 2.Develop the state equations from the state table. 3.Determine the type of flip-flop to be used. 4.Manipulate the state equation into the form of the characteristic equation for each flip-flop. This will yield the flip-flop input expressions. Notes: It is easiest to design by state equations using D flip-flops. Many PLD’s only support D flip-flop designs, so state equations are very useful. JK flip-flop designs will yield the simplest circuits in general. Designing circuits by the excitation table method method and by the state equation method should yield the same results.

7 Lecture #15 EGR 277 – Digital Logic Example: Design a modulo-7 counter by the state equation method using: A) D flip-flops

8 Lecture #15 EGR 277 – Digital Logic Example: Design a modulo-7 counter by the state equation method using: B) JK flip-flops.