DIGITAL SYSTEM DESIGN (EE273) FALL 2016 YOUNG HWAN KIM ( 김 영 환 ) 1

 Class Syllabus  Lecture Syllabus  Laboratory Syllabus  Q&A about this class Outlines 2/23

 Instructor information  Name: Young Hwan Kim ( 김 영 환 )  Office: Room 405. LG Bldg  Telephone:   Home page:  Office hours  15:30-16:00 Monday, Wednesday  I also suggest you to make an individual arrangement when you feel it necessary by writing me an or by making a phone call. Class Synopsis 3/23

 Class objectives of EE273 (Digital System Design)  To VERY BRIEFLY overview the technologies of logic circuits: RTL, TTL, ECL, CMOS ( 논리회로의 Overview)  To study the design methodology for digital systems ( 디지 털 시스템의 설계 방법론 ) Combinational logic design Sequential system design  Hands-on design experience through laboratory projects ( 실제 설계 및 실험 )  Class size: 49/50 enrollments (as of Aug. 26, 2016)  Prerequisites: None Class Synopsis 4/23

 Major obligatory subject for electrical engineering students ( 전공 필수 ); All EE students are supposed to take EE273, preferably at the Sophomore level.  This is an English-only class by the University policy  Class composition: Lecture + Laboratory  Lecture-Laboratory-Units:  Lecture  Lecture hours: 11:00–12:15, Monday and Wednesday  Lecture room: Room 105, LG Building Class Synopsis 5/23

 Laboratory  Laboratory hours: 8:00 PM – 9:40 PM, Monday  Laboratory room: 404 (40 students) & 503 (30 students), Eng-2 Building  Laboratory proceeding plan: two laboratory classes Class Synopsis Brief lab lecture by TA Lab A Experiments Lab B Experiments 100 min 15~20 min 6/23

 Teaching assistants  TA working styles: possibilities Class Synopsis TA 1TA 2TA 3 Lab A (32 students)Lab B (17 students) Lecture TA 1TA 2 Lab A (25)Lab B (24)Lecture 임진하 김경환 한소담 7/23

VERY IMPORTANT ANNOUNCEMENTS  Class attendance requirements  Lecture: You need to attend the class lectures more than 75%. Otherwise, whatever the reason is, you end up with class failure (F). This is a regulation enforced by the Ministry of education.  Laboratory: You need to attend the laboratory more than 90%. Otherwise, class failure (F).  If you cannot check in the lecture using your student ID card for any reason, report me right after the class and then write ( ) me again later. I will correct your attendance in the end of the semester. Class Synopsis 8/23

VERY IMPORTANT ANNOUNCEMENTS  The first laboratory class will be held as follows.  September 5 (Today)  LG-105 (Very this room) Class Synopsis 9/23

VERY IMPORTANT ANNOUNCEMENTS  Grading policy  Lecture (Total 65%)  Laboratory (Total 35%) Class Synopsis 10/23  Lecture Grading (Total 65%)  Assignments: 10%  Midterm examination: 25%,  Final examination: 30%

 Laboratory Grading (Total 35%):  Weight decomposition is subject to change, respecting TAs’ opinions.  Tentatively, the weights are as follows. Experiment report (Attendance required) 10%, Quiz (Short examination to be taken berore the lab class starts) 10% Laboratory project 15% Project proposal 2% Project report 5% Project demo 8% Class Synopsis 11/23

 Laboratory course is guided by TAs.  The Laboratory project is very tough. Much tougher than you think.  Laboratory can accommodate only 60 students at maximum, considering the equipments and space available.  Some of the higher-level classes:  Microprocessors  Computer Architecture  VLSI System Design (ECE 571) Miscellaneous Information 12/23

Lecture Syllabus FALL 2015 YOUNG HWAN KIM ( 김 영 환 )

 Lecture Objectives  To provide the basic knowledge necessary for digital system design Combinational logic design Sequential system design  Examination schedule  Midterm examination 26 October (Wednesday)  Final examination 14 December (Wednesday) Lecture 14/23

Textbook  Randy Katz and Gatetano Borriello, Contemporary Logic Design, 2 nd Ed., 2005, Pearson/Prentice Hall References  Digital system design is a kind of well established engineering course.  Any books about digital logic design will be fine.  John Wakerly, Digital Design Principles and Practices, 2005, Prentice Hall References: Easy to understand with details  Charles Roth, Jr., Fundamentals of Logic Design, West Publishing Company  Alan Marcovitz, Introduction to Logic and Computer Design, 2008, Mc Graw Hill  Morris Mano and Charles R. Kime, Logic and Computer Design Fundamentals, 2004, Prentice Hall Textbook and References 15/23

4 topics Lecture Schedule Combinational Logic Sequential System Number System and Circuits Introduction (Independent study) 16/23

WeekContents Short introduction 1Chap. 1/Chap. 2: Combinational Logic Combinational logic 2Chap. 2: Combinational Logic Minimization (Boolean Expression, K-map) 3-4Chap. 3: Working with Combinational Logic (Quine-McClusky, Espresso, Time Response) 5-6Chap. 4: Combinational Logic Technology 7Chap. 5: Case Studies in CL Design (Logic Function Unit, Adder) Lecture Schedule 17/23

Midterm Exam. 8Chap. 6 / App. C: Sequential Logic Design 9Chap. 7: Finite State Machines 10-12Chap. 8: Working with Finite State Machines 13 Chap. 9: Sequential Logic Technologies Chap. 10: Case Studies in Sequential Logic Design 14-15App. A/Chapter 5: Number System Final Exam Lecture Schedule (Modified) 18/23

Laboratory Syllabus FALL 2016 YOUNG HWAN KIM ( 김 영 환 ) 19

 Laboratory objectives  Understanding the lecture material through associated experiments  Developing abilities to design and implement digital systems  Laboratory consists of the following five subjects  How to use basic equipments  Small projects  Experiments with discrete components  PLD experiments  Lab project (either discrete component project or PLD project) Laboratory 20/23

Laboratory Huins’ EasyFPGA-COMBO for PLD experiments 21/23

Subject to change ■Week 1: Introduction / Lecture (Equipments) / ■ Lab lecture ■Week 2/3: Small Projects (Soldering required) ■Weeks :  HW Labs – Laboratory manual (by Leach)  SW Labs ■Weeks 11–14: Project Implementation ■Week (12/7-14): Demonstration (Report due) Laboratory Schedule 22/23

Laboratory The detailed laboratory syllabus will be discussed in the lab class.  LG 105  8:00 PM, Today 23/23