Chapter 14: The Arithmetic Coprocessor, MMX, and SIMID Technologies

Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. The Intel Microprocessors: 8086/8088, 80186/80188, 80286, 80386, Pentium, Pentium Pro Processor, Pentium II, Pentium, 4, and Core2 with 64-bit Extensions Architecture, Programming, and Interfacing, Eighth Edition Barry B. Brey Instruction Set of Intel 8087  The instructions are fetched by 8086 but are executed by  Whenever the 8086 comes across 8087 instruction, it executes the ESCAPE instruction code to pass over the instruction op-code and control of the local bus to  After execution the result is referred back.

Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. The Intel Microprocessors: 8086/8088, 80186/80188, 80286, 80386, Pentium, Pentium Pro Processor, Pentium II, Pentium, 4, and Core2 with 64-bit Extensions Architecture, Programming, and Interfacing, Eighth Edition Barry B. Brey Categorization of Instruction set 1.Data transfer Instructions. 2.Arithmetic Instructions 3.Comparison Instructions 4.Transcendental Instructions 5.Constant Instructions 6.Coprocessor Control Instructions

Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. The Intel Microprocessors: 8086/8088, 80186/80188, 80286, 80386, Pentium, Pentium Pro Processor, Pentium II, Pentium, 4, and Core2 with 64-bit Extensions Architecture, Programming, and Interfacing, Eighth Edition Barry B. Brey Data Transfer Instructions There are three basic data transfers: –floating-point –signed integer –BCD Inside the coprocessor, data are always stored as an 80-bit extended-precision floating-point number.

Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. The Intel Microprocessors: 8086/8088, 80186/80188, 80286, 80386, Pentium, Pentium Pro Processor, Pentium II, Pentium, 4, and Core2 with 64-bit Extensions Architecture, Programming, and Interfacing, Eighth Edition Barry B. Brey Floating-Point Data Transfers There are four traditional floating-point data transfer instructions in the coprocessor instruction set: –FLD (load real) –FST (store real) –FSTP (store real and pop) –FXCH (exchange)

Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. The Intel Microprocessors: 8086/8088, 80186/80188, 80286, 80386, Pentium, Pentium Pro Processor, Pentium II, Pentium, 4, and Core2 with 64-bit Extensions Architecture, Programming, and Interfacing, Eighth Edition Barry B. Brey FLD loads floating-point data to the top of the internal stack. –referred to as ST (stack top) FLD ST (7) ; Stack top  [Reg 7] FLD MEM ; Stack Top  [MEM] FST stores a copy of the top of the stack to the memory location or coprocessor register indicated by the operand. FST ST(7);Stack top  [ ST (7) ] FST MEM;stack Top  [MEM] FSTP stores a copy of the top of the stack to memory or any coprocessor register, then pops the data from the top of the stack. –one might think of FST as a copy instruction and FSTP as a removal instruction

Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. The Intel Microprocessors: 8086/8088, 80186/80188, 80286, 80386, Pentium, Pentium Pro Processor, Pentium II, Pentium, 4, and Core2 with 64-bit Extensions Architecture, Programming, and Interfacing, Eighth Edition Barry B. Brey FXCH exchanges the register indicated by the operand with the top of the stack. –for example, FXCH ST(2) exchanges the top of the stack with register 2 FXCHST (6); stack top  ST (6)

Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. The Intel Microprocessors: 8086/8088, 80186/80188, 80286, 80386, Pentium, Pentium Pro Processor, Pentium II, Pentium, 4, and Core2 with 64-bit Extensions Architecture, Programming, and Interfacing, Eighth Edition Barry B. Brey Integer Data Transfer Instructions The coprocessor supports three integer data transfer instructions: –FILD (load integer) FILD ST(5) ; stack Top  ST (5) –FIST (store integer) –FISTP (store integer and pop) These function as do FLD, FST, and FSTP, except data transferred are integer data.

Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. The Intel Microprocessors: 8086/8088, 80186/80188, 80286, 80386, Pentium, Pentium Pro Processor, Pentium II, Pentium, 4, and Core2 with 64-bit Extensions Architecture, Programming, and Interfacing, Eighth Edition Barry B. Brey BCD Data Transfer Instructions Two instructions load or store BCD signed-integer data. FBLD loads the top of the stack with BCD data. FBSTP stores the top of the stack and does a pop.

Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. The Intel Microprocessors: 8086/8088, 80186/80188, 80286, 80386, Pentium, Pentium Pro Processor, Pentium II, Pentium, 4, and Core2 with 64-bit Extensions Architecture, Programming, and Interfacing, Eighth Edition Barry B. Brey Arithmetic Instructions Arithmetic instructions for the coprocessor include addition, subtraction, multiplication, division, and calculating square roots. –arithmetic-related instructions are scaling, rounding, absolute value, and changing sign All arithmetic operations are floating-point, except some cases in which memory data are referenced as an operand.

Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. The Intel Microprocessors: 8086/8088, 80186/80188, 80286, 80386, Pentium, Pentium Pro Processor, Pentium II, Pentium, 4, and Core2 with 64-bit Extensions Architecture, Programming, and Interfacing, Eighth Edition Barry B. Brey Arithmetic Operations The letter P in an opcode specifies a register pop after the operation. –FADDP compared to FADD The letter R in an opcode (subtraction and division only) indicates reverse mode. –subtracts the top of the stack from memory and stores the result in the top of the stack Letter I as a second letter in an opcode indicates the memory operand is an integer. –also applies to FADD, FSUB, FMUL, and FDIV

Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. The Intel Microprocessors: 8086/8088, 80186/80188, 80286, 80386, Pentium, Pentium Pro Processor, Pentium II, Pentium, 4, and Core2 with 64-bit Extensions Architecture, Programming, and Interfacing, Eighth Edition Barry B. Brey Arithmetic-Related Operations FSQRT Finds the square root of the top of the stack and leaves the resultant square root at the top of the stack. –an invalid error occurs for the square root of a negative number The IE bit of the status register should be tested when an invalid result can occur. –test IE by loading the status register to AX with FSTSW AX, followed by TEST AX,1 to test the bit

Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. The Intel Microprocessors: 8086/8088, 80186/80188, 80286, 80386, Pentium, Pentium Pro Processor, Pentium II, Pentium, 4, and Core2 with 64-bit Extensions Architecture, Programming, and Interfacing, Eighth Edition Barry B. Brey Arithmetic-Related Operations FSCALE FSCALE multiplies or divides rapidly by powers of two.

Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. The Intel Microprocessors: 8086/8088, 80186/80188, 80286, 80386, Pentium, Pentium Pro Processor, Pentium II, Pentium, 4, and Core2 with 64-bit Extensions Architecture, Programming, and Interfacing, Eighth Edition Barry B. Brey Arithmetic-Related Operations FPREM Performs modulo division of ST by ST(1). The resultant remainder is found in the top of the stack and has the same sign as the original dividend. –a modulo division results in a remainder without a quotient

Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. The Intel Microprocessors: 8086/8088, 80186/80188, 80286, 80386, Pentium, Pentium Pro Processor, Pentium II, Pentium, 4, and Core2 with 64-bit Extensions Architecture, Programming, and Interfacing, Eighth Edition Barry B. Brey Decomposes the number at the top of the stack into separate parts representing value of the unbiased exponent and significand. The extracted significand is found at the top of the stack and the unbiased exponent at ST(1). FXTRACT Arithmetic-Related Operations

Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. The Intel Microprocessors: 8086/8088, 80186/80188, 80286, 80386, Pentium, Pentium Pro Processor, Pentium II, Pentium, 4, and Core2 with 64-bit Extensions Architecture, Programming, and Interfacing, Eighth Edition Barry B. Brey Arithmetic-Related Operations FRNDINT Rounds the top of the stack to an integer. FABS Changes the sign of the top of the stack to positive. FCHS Changes the sign from positive to negative or negative to positive.

Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. The Intel Microprocessors: 8086/8088, 80186/80188, 80286, 80386, Pentium, Pentium Pro Processor, Pentium II, Pentium, 4, and Core2 with 64-bit Extensions Architecture, Programming, and Interfacing, Eighth Edition Barry B. Brey Comparison Instructions Examine data at the top of the stack in relation to another element and return the result of the comparison in the status register condition code bits C 3 –C 0. FCOM Compares the floating-point data at the top of the stack with an operand, which may be any register or any memory operand. –if not coded with the instruction, the next stack element ST(1) is compared with the stack top ST

Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. The Intel Microprocessors: 8086/8088, 80186/80188, 80286, 80386, Pentium, Pentium Pro Processor, Pentium II, Pentium, 4, and Core2 with 64-bit Extensions Architecture, Programming, and Interfacing, Eighth Edition Barry B. Brey Comparison Instructions FCOMP/FCOMPP Both perform as FCOM, but also pop one or two data from the stack. FICOM/FICOMP The top of the stack is compared with the integer stored at a memory operand. –FICOMP also pops the top of the stack

Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. The Intel Microprocessors: 8086/8088, 80186/80188, 80286, 80386, Pentium, Pentium Pro Processor, Pentium II, Pentium, 4, and Core2 with 64-bit Extensions Architecture, Programming, and Interfacing, Eighth Edition Barry B. Brey Comparison Instructions FTST Tests the contents of the top of the stack against a zero. Result of the comparison is coded in the status register condition code bits

Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. The Intel Microprocessors: 8086/8088, 80186/80188, 80286, 80386, Pentium, Pentium Pro Processor, Pentium II, Pentium, 4, and Core2 with 64-bit Extensions Architecture, Programming, and Interfacing, Eighth Edition Barry B. Brey Comparison Instructions FXAM Examines the stack top and modifies the condition code bits to indicate whether the contents are positive, negative, normalized, and so on.

Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. The Intel Microprocessors: 8086/8088, 80186/80188, 80286, 80386, Pentium, Pentium Pro Processor, Pentium II, Pentium, 4, and Core2 with 64-bit Extensions Architecture, Programming, and Interfacing, Eighth Edition Barry B. Brey Transcendental Operations FPTAN Instruction calculates the partial tangent of an angle θ. where θ must be in range from 0<= θ < 90 0 { ST/ST(1) } The value of θ must be stored at the stack top. ST(7) must be empty for this instruction to function properly.

Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. The Intel Microprocessors: 8086/8088, 80186/80188, 80286, 80386, Pentium, Pentium Pro Processor, Pentium II, Pentium, 4, and Core2 with 64-bit Extensions Architecture, Programming, and Interfacing, Eighth Edition Barry B. Brey Transcendental Operations FPATAN  Instruction calculates the partial inverse tangent  The result is stored on the top of the stack.  The content of ST and ST(1) should follow the inequality. 0<=ST(1) < ST< infinity The instruction pops the stack and leaves θ in radians at the top of the stack.

Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. The Intel Microprocessors: 8086/8088, 80186/80188, 80286, 80386, Pentium, Pentium Pro Processor, Pentium II, Pentium, 4, and Core2 with 64-bit Extensions Architecture, Programming, and Interfacing, Eighth Edition Barry B. Brey Transcendental Operations F2XM1 Finds the function 2 X – 1. –value of X is taken from the top of the stack and the result is returned to the top of the stack To obtain 2 X add one to the result at the top of the stack.

Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. The Intel Microprocessors: 8086/8088, 80186/80188, 80286, 80386, Pentium, Pentium Pro Processor, Pentium II, Pentium, 4, and Core2 with 64-bit Extensions Architecture, Programming, and Interfacing, Eighth Edition Barry B. Brey Transcendental Operations FSIN/FCOS Finds sine or cosine of the argument located in ST expressed in radians (360°=2π radians), with the result found in ST. FSINCOS Finds sine and cosine of ST, expressed in radians, and leaves results as ST = sine and ST(1) = cosine.

Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. The Intel Microprocessors: 8086/8088, 80186/80188, 80286, 80386, Pentium, Pentium Pro Processor, Pentium II, Pentium, 4, and Core2 with 64-bit Extensions Architecture, Programming, and Interfacing, Eighth Edition Barry B. Brey Transcendental Operations FYL2X Finds Y log 2 X. –value X is taken from the stack top –Y is taken from ST(1) Result is found at the stack top after a pop. –value of X must range between 0 and ∞ –value of Y must be between –∞ and +∞

Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. The Intel Microprocessors: 8086/8088, 80186/80188, 80286, 80386, Pentium, Pentium Pro Processor, Pentium II, Pentium, 4, and Core2 with 64-bit Extensions Architecture, Programming, and Interfacing, Eighth Edition Barry B. Brey Transcendental Operations FYL2XP1 Finds Y log 2 (X + 1). The value of X is taken from the stack top and Y is taken from ST(1). The result is found at the top of the stack after a pop.

Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. The Intel Microprocessors: 8086/8088, 80186/80188, 80286, 80386, Pentium, Pentium Pro Processor, Pentium II, Pentium, 4, and Core2 with 64-bit Extensions Architecture, Programming, and Interfacing, Eighth Edition Barry B. Brey Constant Operations The coprocessor instruction set includes opcode that return constants to the top of the stack. –FLDZ +0.0 –FLD –FLDPI –FLDL2Tlog 2 10 –FLDL2Elog 2 ε –FLDLG2log 10 2 –FLDLN2log ε 2

Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. The Intel Microprocessors: 8086/8088, 80186/80188, 80286, 80386, Pentium, Pentium Pro Processor, Pentium II, Pentium, 4, and Core2 with 64-bit Extensions Architecture, Programming, and Interfacing, Eighth Edition Barry B. Brey Coprocessor Control Instructions FINIT/FNINIT Performs a reset (initialize) operation on the arithmetic coprocessor. The coprocessor uses extended-precision when reset or initialized. –also sets register 0 as the top of the stack

Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. The Intel Microprocessors: 8086/8088, 80186/80188, 80286, 80386, Pentium, Pentium Pro Processor, Pentium II, Pentium, 4, and Core2 with 64-bit Extensions Architecture, Programming, and Interfacing, Eighth Edition Barry B. Brey Coprocessor Control Instructions FLDCW Loads the control register with the word addressed by the operand. FSTCW Stores the control register into the word-sized memory operand.

Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. The Intel Microprocessors: 8086/8088, 80186/80188, 80286, 80386, Pentium, Pentium Pro Processor, Pentium II, Pentium, 4, and Core2 with 64-bit Extensions Architecture, Programming, and Interfacing, Eighth Edition Barry B. Brey Coprocessor Control Instructions FSTSW AX Copies the contents of the control register to the AX register. FCLEX Clears the error flags in the status register and also the busy flag.

Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. The Intel Microprocessors: 8086/8088, 80186/80188, 80286, 80386, Pentium, Pentium Pro Processor, Pentium II, Pentium, 4, and Core2 with 64-bit Extensions Architecture, Programming, and Interfacing, Eighth Edition Barry B. Brey Coprocessor Control Instructions FDECSP Decrements the stack pointer. FNOP Floating-point coprocessor NOP. FWAIT Causes the microprocessor to wait for the coprocessor to finish an operation. –should be used before the microprocessor accesses memory data affected by the coprocessor

Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. The Intel Microprocessors: 8086/8088, 80186/80188, 80286, 80386, Pentium, Pentium Pro Processor, Pentium II, Pentium, 4, and Core2 with 64-bit Extensions Architecture, Programming, and Interfacing, Eighth Edition Barry B. Brey FINIT: initialize 8087 FLD L: get L FMUL C: form LC FSQRT: form square root of LC FLDPI: get pi FADD ST, ST(0): form 2 pi FMUL: form 2pi square root LC FLD1: 1 at the ST FDIVR: form reciprocal FSTP RES: store result to a memory location

Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. The Intel Microprocessors: 8086/8088, 80186/80188, 80286, 80386, Pentium, Pentium Pro Processor, Pentium II, Pentium, 4, and Core2 with 64-bit Extensions Architecture, Programming, and Interfacing, Eighth Edition Barry B. Brey Microprocessors and Interfacing D V Hall, SSSP Rao Short Notes: Editor, Assembler, Linker, Locator, Debugger, Emulator Page: 3.24 Basic: Writing programs for use with an Assembler SEGMENT and ENDS, EQU, DB, DW, DD, ASSUME, and END directives Page 3.17 Basic: Reentrant and Recursive procedures Fig. 5.20, Fig Page 5.23