1 GENERAL OVERVIEW Emmanuel LEROUX Chief Application Engineer

Application Domain Signal Integrity investigation –efficient handling of huge number of transmission lines –simultaneous analysis of transmission, crosstalk and switching noise issues High-speed and complex system design&validation MCM, PCB, Backplane, Interconnection layout check EMC/EMI analysis Hardware quality verification

Application Market Telecom Computer Automotive Aerospace Automatic Test Equipment Measurement Biomedical Consumer Electronics

Technologies supported PCB MCM Hybrid Interconnect levels multiboards backplane LANS entire apparatus

Platforms supported HP 9000/700 Series Sun SPARC, ULTRA Series PC Windows NT 4.0

6 of 17 THE CONCEPT PRESTO FILE_TYPE=HDT_PLIB; TIME=Thu Dec 10 10:45: COMPONENT=AC04, 74AC04; FAMILY=FACT; PACKAGE=DEFAULT, DIP14, SOIC14; FACTORY=DEFAULT; TYPE=IC; NPINS=14; BEGIN_PIN FACT_DR24_P=2,4,6,8,10,12; FACT_RC_P=1,3,5,9,11,13; FACT_GND_P=7; FACT_VCC_P=14; END_PIN; BEGIN_FUNCTION DRIVER=2,4,6,8,10,12; RECEIVER=1,3,5,9,11,13; POWER_FACT=14; GROUND_FACT=7; END_FUNCTION; END. Driver Receiver SSN report Compliance analysis report Overshoots undershoots rise and fall time report V -4.00V -3.00V -2.00V -1.00V 0.00V 1.00V 2.00V 3.00V 4.00V 5.00V 6.00V 7.00V 8.00V

7 of 17 The HDT line: “The Backbone” n SPRINT – S imulation P rogram of R esponse of I ntegrated N etwork T ransients n SIGHTS – S tandard I nterface for G raphic H andling of T ransient S ignals n Mod-env – Modeling environment

8 of 17 The HDT line: “Signal Integrity” n PRESTO –P ost-layout R apid E xhaustive S imulation and T est of O peration n TEMPO –T ool for E lectrical M ultiple P erformance O ptimization n XTALK –CrossTALK n SSN –S imultaneous S witching N oise

9 of 17 The HDT line: “EMC” n PRESTO _ CNT –P ost-layout simulation to evaluate C onducted N oise T ransmission n EMIR –EMI ssion R adiated n EMIR-Cable –Cable attached PCB emission & conducted noise transmission analysis

10 of 17 The differentiators: “Fast” Remember this: approx 0.3 secs for single net simulation! Comparison between simulation and measures of high-speed multiboard system (155Mbit/s) elements 32 simultaneous input sequence time points 60 min. simulation time on a HP 750

11 of 17 n Simultaneous simulation of all nets of a complex PCB is available n Presto can simulate signal integrity, crosstalk but also simultaneous switching noise on vcc/gnd nets or planes n Many benchmark results are available to demonstrate a good comparison with measurement The differentiators: “Accurate”

12 of 17 The differentiators: “User friendly”

13 of 17 n It is possible to predict results of precompliance tests for: –RADIATED EMISSIONS –CONDUCTED NOISE SUSCEPTIBILITY –CONDUCTED EMISSIONS The differentiators: “A complete solution”

14 of 17 The differentiators: “Advanced”

Collaborations Research centers: »CSELT inside of THRIS product (telecom market) »COREP »ITALTEL in EMC/EMI

University research&thesis: »Politecnico di Torino (Prof. Canavero), »Università di Ancona (Prof. De leo), »Università di L’Aquila (Prof. Orlandi), »University of Belgrade (Prof. Djordjeviz), »University of Lille (Prof. Demoulin) Collaborations

EUROPRACTICE Training Courses: »EMC/EMI design for Printed Circuit Boards ESPRIT ESD: »EMCLO (Magneti Marelli) »OMEGA (Aerospatiale) »MERITA (Bull) »RISIP (GEA) Collaborations