Simone Campanoni simonec@eecs.northwestern.edu SSA Simone Campanoni simonec@eecs.northwestern.edu.

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Presentation transcript:

Simone Campanoni simonec@eecs.northwestern.edu SSA Simone Campanoni simonec@eecs.northwestern.edu

Steps to follow: LLVM 3.8.1 is installed on Wilkinson lab machines /home/software/llvm Steps to follow: $ ssh hanlon.wot.eecs.northwestern.edu $ bash $ export PATH=/home/software/llvm/bin:$PATH $ scl enable devtoolset-4 python27 bash $ export CC=gcc $ export CXX=g++ $ edit run_me.sh to invoke “cmake3” instead of “cmake” $ ./run_me.sh

Def-use chain OUT[ENTRY] = { }; for (each instruction i other than ENTRY) OUT[i] = { }; while (changes to any OUT occur) for (each instruction i other than ENTRY) { IN[i] = ∪p a predecessor of i OUT[p]; OUT[i] = GEN[i] ∪ (IN[i] ─ KILL[i]); } } Given a variable t, we need to find all definitions of t in the CFG How can we do it in LLVM? i: t <- … GEN[i] = {i} KILL[i] = defs(t) – {i} i: … GEN[i] = {} KILL[i] = {}

LLVM IR (4) It’s a Static Single Assignment (SSA) representation A variable is set only by one instruction in the function body %myVar = … A static assignment can be executed more than once While (…){ %myVar = ... }

NOT SSA SSA SSA and not SSA example float myF (float par1, float par2, float par3){ return (par1 * par2) + par3; } define float @myF(float %par1, float %par2, float %par3) { %1 = fmul float %par1, %par2 %1 = fadd float %1, %par3 ret float %1 } NOT SSA define float @myF(float %par1, float %par2, float %par3) { %1 = fmul float %par1, %par2 %2 = fadd float %1, %par3 ret float %2 } SSA

Consequences of SSA Unrelated uses of the same variable in source code become different variables in the SSA form Use—def chain are greatly simplified Data-flow analysis are simplified (… in the next slides) Code analysis (e.g., data flow analysis) can be designed to run faster v = 5; print(v); v = 42; v1 = 5 call print(v1) v2 = 42 call print(v2) To SSA IR

Motivation for SSA Code analysis needs to represent facts at every program point What if There are a lot of facts and there are a lot of program points? Potentially takes a lot of space/time Code analyses run slow Compilers run slow define float @myF(float %par1, float %par2, float %par3) { %1 = fmul float %par1, %par2 %2 = fadd float %1, %par3 ret float %2 } Definition of %1 reaches here Definition of %1 reaches here

Example

Sparse representation Instead, we’d like to use a sparse representation Only propagate facts about x where they’re needed Enter static single assignment form Each variable is defined (assigned to) exactly once But may be used multiple times

Static Single Assignment (SSA) Add SSA edges from definitions to uses No intervening statements define variable Safe to propagate facts about x only along SSA edges In our pass llvm/4 call->uses()

What about join nodes in the CFG? Add Φ functions to model joins One argument for each incoming branch Operationally selects one of the arguments based on how control flow reach this node The backend needs to eliminate Φ nodes b = c + 1 b = d + 1 b1 = c + 1 b2 = d + 1 b1 = c + 1 b2 = d + 1 If (b > N) If (? > N) b3=Φ(b1, b2) If (b3 > N) Not SSA Still not SSA SSA

Eliminating Φ Basic idea: Φ represents facts that value of join may come from different paths So just set along each possible path b1 = c + 1 b2 = d + 1 b1 = c + 1 b3 = b1 b2 = d + 1 b3 = b2 b3=Φ(b1, b2) If (b3 > N) If (b3 > N) Not SSA

Eliminating Φ in practice Copies performed at Φ may not be useful Joined value may not be used later in the program (So why leave it in?) Use dead code elimination to kill useless Φs Subsequent register allocation will map the variables onto the actual set of machine register

SSA efficiency in practice

Consequences of SSA Unrelated uses of the same variable in source code become different variables in the SSA form Use—def chain are greatly simplified Data-flow analysis are simplified Code analysis (e.g., data flow analysis) can be designed to run faster v = 5; print(v); v = 42; v1 = 5 call print(v1) v2 = 42 call print(v2) To SSA IR

Def-use chain OUT[ENTRY] = { }; for (each instruction i other than ENTRY) OUT[i] = { }; while (changes to any OUT occur) for (each instruction i other than ENTRY) { IN[i] = ∪p a predecessor of i OUT[p]; OUT[i] = GEN[i] ∪ (IN[i] ─ KILL[i]); } } i: t <- … GEN[i] = {i} KILL[i] = defs(t) – {i} i: … GEN[i] = {} KILL[i] = {}

Def-use chain with SSA OUT[ENTRY] = { }; for (each instruction i other than ENTRY) OUT[i] = { }; while (changes to any OUT occur) for (each instruction i other than ENTRY) { IN[i] = ∪p a predecessor of i OUT[p]; OUT[i] = GEN[i] ∪ (IN[i] ─ KILL[i]); } } i: t <- … GEN[i] = {i} KILL[i] = {} i: … GEN[i] = {} KILL[i] = {}

Code example i: b0 = 1 ?: b0 = b0 + 2 j:b1 = b0 + 1 Question answered by reaching definition analysis: does the definition “i” reach “j”?

Code example How should we design constant propagation for SSA IRs? i: b0 = 1 j:b1 = 1 + 1 k:b2 = 2 p:b3=Φ(b1, b2) z:return b3 Does it mean we can always propagate constants to variable uses? What are the definitions of b3 that reach “z”?

SSA in LLVM The IR must be in SSA all the time Checked at boundaries of passes No time wasted converting automatically IR to its SSA form CAT designed with this constraint in mind Φ instructions only at the top of a basic block Must have exactly 1 entry for every predecessor Must have at least one entry May include undef values

SSA in LLVM: changing variable values Let’s say we have a LLVM IR variable and we want to add code to change its value How should we do it? %v = … %v = … %v = %v + 1 Builder.CreateAdd(i, const1) And then? replaceAllUsesWith

SSA in LLVM: changing variable values Let’s say we need to generate LLVM IR for the C code How should we do it? Memory isn’t in SSA, just registers (e.g., stack locations---alloca) Exploit already existing passes to reduce inefficiencies (mem2reg) mem2reg maps memory locations to registers when possible int n = n+1; opt –mem2reg mybitcode.bc –o mybitcode.bc

The mem2reg LLVM pass

mem2reg might add new instructions

mem2reg get confused easily