CPSC 121: Models of Computation Unit 10: A Working Computer CPSC 121 – 2010W T2

Unit 10: A Working Computer The 10th online quiz is due Sunday, March 27th at 21:00. Assigned reading for the quiz: Epp, 4th edition: 6.1 Epp, 3rd edition: 5.1 Rosen, 6th edition: 2.1 Assignment #6: for practice only (and exercises learning goals we haven't reached yet!) CPSC 121 – 2010W T2

Unit 10: A Working Computer Unit Summary: Implementing a working computer in Logisim Appendices CPSC 121 – 2010W T2

Unit 10: A Working Computer Von-Neumann architecture Memory (contains both programs and data). CPU Input/Output CPSC 121 – 2010W T2

Unit 10: A Working Computer Memory Contains both instructions and data. Divided into a number of memory locations Think of positions in a list: (list-ref mylist pos) Or in an array: myarray[pos] Each memory location contains (usually) 8 bits Values longer than 8 bits use up several neighbouring memory locations. CPSC 121 – 2010W T2

Unit 10: A Working Computer CPU Decides which instructions to execute (“fetches” it) Determines what needs to be done for that instruction (“decodes” it) Executes the instruction And then decides on the next instruction to execute... CPSC 121 – 2010W T2

Unit 10: A Working Computer Our working computer: Implements the design presented in the textbook by Bryant and O'Hallaron (used for CPSC 213/313). A small subset of the IA32 (Intel 32-bit) architecture. It has 12 types of instructions. One program counter register (PC) contains the address of the next instruction. 8 more 32-bits registers each of them contains one 32 bit value. used for values that we are currently working with. stores a single multi-bit value. CPSC 121 – 2010W T2

Unit 10: A Working Computer Example instruction 1: subl %eax, %ecx The subl instruction subtracts its arguments. The names %eax and %ecx refer to two registers. This instruction takes the value contained in %eax, subtracts it from the value contained in %ecx, and stores the result back in %ecx. Example instruction 2: irmovl $1A, %ecx This instruction stores a constant in a register. In this case, the value 1A (hexadecimal) is stored in %ecx. CPSC 121 – 2010W T2 Sorry for the dumb register names! They're an artifact of the long Intel Architecture history!

Unit 10: A Working Computer Example instruction 3: jge $1000 This is a conditional jump instruction. It checks to see if the result of the last arithmetic or logic operation was zero or positive (Greater than or Equal to 0). If so, the next instruction is the instruction stored in memory address 1000 (hexadecimal). If not, the next instruction is the instruction that follows the jge instruction. Without jumps, we'd have no loops and no recursion! CPSC 121 – 2010W T2

Unit 10: A Working Computer How does the computer know which instruction does what? Each instruction is a sequence of 16 to 48 bits† Some of the bits tell it which instruction it is. Other bits tell it what operands to use. These bits are used as select input for several multiplexers. Modified slightly from the Y86 presented in the textbook by Bryant and O'Hallaron CPSC 121 – 2010W T2

Unit 10: A Working Computer Example: CPSC 121 – 2010W T2

Unit 10: A Working Computer Example 1: subl %eax, %ecx Represented by 6101 (hexadecimal) %ecx %eax subtraction arithmetic or logic operation (for the “Arithmetic Logic Unit: ALU”) CPSC 121 – 2010W T2

Unit 10: A Working Computer Example 2: jge $1000 Represented by 758800001000 (hexadecimal) $1000 ignored (there are only registers 0 through 7!) “greater than or equal to” (vs. “no matter what”, “less than”, ...) jump CPSC 121 – 2010W T2

Unit 10: A Working Computer How is an instruction executed? This CPU divides the execution into 6 stages: Fetch: read instruction and decide on new PC value CPSC 121 – 2010W T2

Unit 10: A Working Computer Six stages of execution (continued) Decode: read values from registers Execute: use the ALU to perform computations Some of them are obvious from the instruction (e.g. subl) Other instructions use the ALU as well (e.g., some memory operations do addition/subtraction) Memory: read data from or write data to memory (we won't play with memory, to keep things simple) Write-back: store value(s) into register(s). PC update: store the new PC value. Not all stages do something for every instruction. CPSC 121 – 2010W T2

Unit 10: A Working Computer Sample program: irmovl $500,%eax irmovl $decade, %ecx subl %eax, %ecx CPSC 121 – 2010W T2

Unit 10: A Working Computer Example 1: subl %eax, %ecx Fetch: current instruction ← 6101 next PC value ← current PC value + 2 Decode: valA ← value of %eax valB ← value of %ecx Execute: valE ← valB - valA Memory: nothing needs to be done. Write-back: %ecx ← valE PC update: PC ← next PC value CPSC 121 – 2010W T2

Unit 10: A Working Computer Example 2: irmovl $500, %eax Fetch: current instruction ← 308000000500 next PC value ← current PC value + 6 Decode: valC ← 00000500 Execute: valE ← valC + 0 Memory: nothing to do Write-back: %eax ← valE PC update: PC ← next PC value CPSC 121 – 2010W T2

Unit 10: A Working Computer Unit Summary: A little bit of history Implementing a working computer in Logisim Appendices (do NOT try to memorize, just for your reference in lab if it's helpful!) CPSC 121 – 2010W T2

Unit 10: A Working Computer Registers (32 bits each): Instructions that only need one register use 8 or F (or anything in between) for the second register. %esp is used as “stack pointer” (for implementing function calls... we'll ignore!). Memory contains 232 bytes; all memory accesses load/store 32 bits at a time. 1 2 3 %eax %esp %ecx %ebp %edx %esi %ebx %edi 4 5 6 7 CPSC 121 – 2010W T2

Unit 10: A Working Computer Instruction types: register/memory transfers: rmmovl rA, D(rB) M[D + R[rB]] ← R[rA] Example: rmmovl %edx, 20(%esi) mrmovl D(rB), rA R[rA] ← M[D + R[rB]] CPSC 121 – 2010W T2

Unit 10: A Working Computer Instruction types: Other data transfer instructions rrmovl rA, rB R[rB] ← R[rA] irmovl V, rB R[rB] ← V Arithmetic instructions addl rA, rB R[rB] ← R[rB] + R[rA] subl rA, rB R[rB] ← R[rB] − R[rA] andl rA, rB R[rB] ← R[rB] ∧ R[rA] xorl rA, rB R[rB] ← R[rB]  R[rA] CPSC 121 – 2010W T2

Unit 10: A Working Computer Instruction types: Unconditional jumps jmp Dest PC ← Dest Conditional jumps jle Dest PC ← Dest if last result ≤ 0 jl Dest PC ← Dest if last result < 0 je Dest PC ← Dest if last result = 0 jne Dest PC ← Dest if last result ≠ 0 jge Dest PC ← Dest if last result ≥ 0 jg Dest PC ← Dest if last result > 0 CPSC 121 – 2010W T2

Unit 10: A Working Computer Instruction types: Procedure calls and return support call Dest R[%esp]←R[%esp]-4; M[R[%esp]]←PC; PC←Dest; ret PC←M[R[%esp]]; R[%esp]←R[%esp]+4 pushl rA R[%esp]←R[%esp]-4; M[R[%esp]]←R[rA] popl rA R[rA]←M[R[%esp]]; R[%esp]←R[%esp]+4 Others halt nop CPSC 121 – 2010W T2

Unit 10: A Working Computer Instructions format 1 2 3 4 5 nop halt rrmovl rA, rB irmovl V, rB rmmovl rA, D(rB) mrmovl D(rB), rA OPI rA, rB jXX Dest call Dest ret pushl rA popl rA 1 2 rA rB 3 F rB V 4 rA rB D 5 rA rB D 6 fn rA rB 7 fn Dest 8 Dest 9 A rA F CPSC 121 – 2010W T2 B rA F

Unit 10: A Working Computer Instructions format: Arithmetic instructions: addl → fn = 0 subl → fn = 1 andl → fn = 2 xorl → fn = 3 Conditional jumps and moves: jump → fn = 0 jle → fn = 1 jl → fn = 2 je → fn = 3 jne → fn = 4 jge → fn = 5 je → fn = 6 CPSC 121 – 2010W T2