Computer Science 210 Computer Organization

Slides:



Advertisements
Similar presentations
1 Input and Output Patt and Patel Ch Computer System.
Advertisements

CSS 372 Lecture 1 Course Overview: CSS 372 Web page Syllabus Lab Ettiquette Lab Report Format Review of CSS 371: Simple Computer Architecture Traps Interrupts.
CHAPTER 4 COMPUTER SYSTEM – Von Neumann Model
Chapter 8 I/O. Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. 8-2 I/O: Connecting to Outside World So far,
CSS 372 Oct 2 nd - Lecture 1 Course Overview: CSS 372 Web page Syllabus Lab Ettiquette Lab Report Format Review of CSS 371: Simple Computer Architecture.
CS 104 Introduction to Computer Science and Graphics Problems Basic Organization & Concepts 09/09/2008 Yang Song (Prepared by Yang Song and Suresh Solaimuthu)
Chapter 8 I/O. Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. 8-2 I/O: Connecting to Outside World So far,
S. Barua – CPSC 240 CHAPTER 8 I/O How are I/O devices identified? Memory-mapped vs. special instructions.
Overview Projects The Assembly Process Programmed I/O Interrupt Driven I/O.
Chapter 8 Overview Programmed I/O Introduction to Interrupt Driven I/O Project 3.
Chapter 8 I/O Programming Chapter 9 Trap Service Routines Programmed I/O Interrupts Interrupt Driven I/O Trap Service Routines.
Chapter 8 Overview Programmed I/O Interrupt Driven I/O.
The von Neumann Model – Chapter 4 COMP 2620 Dr. James Money COMP
Introduction to Computing Systems from bits & gates to C & beyond Chapter 8 Input/Output Basic organization Keyboard input Monitor output Interrupts DMA.
Chapter 8 Input/Output l I/O basics l Keyboard input l Monitor output l Interrupt driven I/O l DMA.
Introduction to Computer Engineering ECE/CS 252, Fall 2010 Prof. Mikko Lipasti Department of Electrical and Computer Engineering University of Wisconsin.
Chapter 8 I/O. Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. 8-2 I/O: Connecting to Outside World So far,
Chapter 4 The Von Neumann Model
Accessing I/O Devices Processor Memory BUS I/O Device 1 I/O Device 2.
Introduction to Computer Engineering CS/ECE 252, Spring 2010 Prof. Guri Sohi Computer Sciences Department University of Wisconsin – Madison.
Input-Output Organization
The von Neumann Model – Chapter 4 COMP 2620 Dr. James Money COMP
Von Neumann Model Computer Organization I 1 September 2009 © McQuain, Feng & Ribbens The Stored Program Computer 1945: John von Neumann –
Chapter 8 Input/Output An Hong 2015 Fall School of Computer Science and Technology Lecture on Introduction to.
Computer Organization and Design
Chapter 8 I/O.
I/O SYSTEMS MANAGEMENT Krishna Kumar Ahirwar ( )
Control Unit Lecture 6.
HKN ECE 220: Fall 2017 Midterm 1 AJ Schroeder, Evan Lissoos, Utsav Kawrani 23rd September, 2017.
Chapter 4 The Von Neumann Model
Operating Systems (CS 340 D)
Computer Science 210 Computer Organization
Input/Output.
1 Input-Output Organization Computer Organization Computer Architectures Lab Peripheral Devices Input-Output Interface Asynchronous Data Transfer Modes.
Chapter 4 The Von Neumann Model
COSC121: Computer Systems: LC3 I/O (Intro)
I/O system.
CS 286 Computer Organization and Architecture
Introduction to Computer Engineering
Computer Science 210 Computer Organization
CS703 - Advanced Operating Systems
Chapter 8 I/O.
Chapter 4 The Von Neumann Model
Chapter 8 Input/Output I/O basics Keyboard input Monitor output
Computer Architecture
Chapter 4 The Von Neumann Model
Chapter 8 I/O.
Computer Science 210 Computer Organization
HKN ECE 220: Spring 2018 Midterm 1
Operating Systems Chapter 5: Input/Output Management
Introduction to Computer Engineering
Chapter 8 I/O.
Introduction to Computer Engineering
Computer Architecture and Assembly Language
Chapter 4 The Von Neumann Model
TRAP Routines Privileged Instructions Subroutines
Chapter 8 I/O.
The Stored Program Computer
Chapter 8 Input/Output An Hong 2016 Fall
COMPUTER ORGANIZATION AND ARCHITECTURE
Chapter 13: I/O Systems.
Introduction to Computer Engineering
Computer Electronic device Accepts data - input
Introduction to Computer Engineering
Introduction to Computer Engineering
Introduction to Computer Engineering
Chapter 4 The Von Neumann Model
Midterm 2 Review Chapters 4-16 LC-3
Presentation transcript:

Computer Science 210 Computer Organization Input and Output

Connecting to the Outside World We can now Compute with data in registers Transfer data between registers and memory Make choices and repeat instructions But how do we Transfer data between the system and the outside world Translate it to a form that people can enter or receive

I/O Device Characteristics Types of I/O devices characterized by: behavior: input, output, storage input: keyboard, motion detector, network interface output: monitor, printer, network interface storage: disk, CD-ROM, flash stick, etc. data rate: how fast can data be transferred? keyboard: 100 bytes/sec disk: 30 MB/s network: 1 Mb/s - 1 Gb/s

I/O Controller CPU Control/Status Registers CPU tells device what to do -- write to control register CPU checks whether task is done -- read status register Data Registers CPU transfers data to/from device Device electronics performs actual operation pixels to screen, bits to/from disk, characters from keyboard Graphics Controller Control/Status CPU Electronics display Output Data

Memory-Mapped vs Instructions designate opcode(s) for I/O register and operation encoded in instruction Memory-mapped assign a memory address to each device register use data movement instructions (LD/ST) for control and data transfer

Transfer Control Polling The CPU keeps checking the status register until new data arrives OR device ready for next data “Are we there yet? Are we there yet? Are we there yet?” Interrupts The device sends a special signal to the CPU when new data arrives OR device ready for next data CPU can be performing other tasks instead of polling device. “Wake me when we get there.”

I/O in LC-3 xFE00 Memory-mapped I/O (Table A.3) xFE02 xFE04 xFE06 Asynchronous devices synchronized through status registers Polling and Interrupts the details of interrupts will be discussed in Chapter 10 Location I/O Register Function xFE00 Keyboard Status Reg (KBSR) Bit [15] is one when keyboard has received a new character. xFE02 Keyboard Data Reg (KBDR) Bits [7:0] contain the last character typed on keyboard. xFE04 Display Status Register (DSR) Bit [15] is one when device ready to display another char on screen. xFE06 Display Data Register (DDR) Character written to bits [7:0] will be displayed on screen.

Keyboard Input When a character is typed: its ASCII code is placed in bits [7:0] of KBDR (bits [15:8] are always zero) the “ready bit” (KBSR[15]) is set to one keyboard is disabled -- any typed characters will be ignored When KBDR is read: KBSR[15] is set to zero keyboard is enabled keyboard data 15 8 7 KBDR 15 14 ready bit KBSR

Basic Input Routine POLL LDI R0, KBSRptr BRzp POLL LDI R0, KBDRptr ... KBSRptr .FILL xFE00 KBDRptr .FILL xFE02 new char? NO Polling YES read character Operand of LDI is an address of a datum that’s another address

Data Path for Memory-Mapped Input Address Control Logic determines whether MDR is loaded from Memory or from KBSR/KBDR.

Monitor Output When Monitor is ready to display another character: the “ready bit” (DSR[15]) is set to one When data is written to Display Data Register: DSR[15] is set to zero character in DDR[7:0] is displayed any other character data written to DDR is ignored (while DSR[15] is zero) output data 15 8 7 DDR 15 14 ready bit DSR

Strings and Text Processing Chapter 8 For Monday after Break Strings and Text Processing Chapter 8