REGISTER TRANSFER AND MICROOPERATIONS

Slides:



Advertisements
Similar presentations
CPEN Digital System Design
Advertisements

Princess Sumaya University
REGISTER TRANSFER LANGUAGE (RTL)
Chapter 4 Register Transfer and Microoperations
Princess Sumaya Univ. Computer Engineering Dept. د. بســام كحـالــه Dr. Bassam Kahhaleh.
Chapter 7 Henry Hexmoor Registers and RTL
Princess Sumaya University
ARITHMETIC LOGIC SHIFT UNIT
1 Register Transfer &  -operations Computer Organization Computer Architectures Lab REGISTER TRANSFER AND MICROOPERATIONS Register Transfer Language Register.
8085 processor. Bus system in microprocessor.
Chapter 9 Computer Design Basics. 9-2 Datapaths Reminding A digital system (or a simple computer) contains datapath unit and control unit. Datapath: A.
Charles Kime & Thomas Kaminski © 2004 Pearson Education, Inc. Terms of Use (Hyperlinks are active in View Show mode) Terms of Use Chapter 7 – Registers.
Instructor: Yuzhuang Hu The Shifter 3 clock cycles will be needed if using a bidirectional shift register with parallel load.  A clock.
Chapter 7. Register Transfer and Computer Operations
Cpe 252: Computer Organization1 Lo’ai Tawalbeh Lecture #4 Register Transfer and Microoperations 23/2/2006 Chapter 4:
Logic and Computer Design Dr. Sanjay P. Ahuja, Ph.D. FIS Distinguished Professor of CIS ( ) School of Computing, UNF.
Chapter 4 Register Transfer and Microoperations
Shift Micro operations
Computer System Configuration and Function Computer Architecture and Design Lecture 6.
EKT 221/4 DIGITAL ELECTRONICS II  Registers, Micro-operations and Implementations - Part2.
MICRO OPERATIONS Department of Computer Engineering, M.S.P.V.L. Polytechnic College, Pavoorchatram.
CSC321 Where We’ve Been Binary representations Boolean logic Logic gates – combinational circuits Flip-flops – sequential circuits Complex gates – modules.
Chapter 4 Register Transfer and Micro -operations
DIGITAL 2 : EKT 221. Today’s Outline Register Transfer Clock Gating Load Control Feedback Register Transfer Language Type of Registers Basic Symbols Mathematical.
REGISTER TRANSFER AND MICROOPERATIONS
Eng. Mohammed Timraz Electronics & Communication Engineer University of Palestine Faculty of Engineering and Urban planning Software Engineering Department.
Computer System Architecture © Korea Univ. of Tech. & Edu. Dept. of Info. & Comm. Chap. 4 Register Transfer and Microoperations 4-1 Chap. 4 Register Transfer.
Exam2 Review Dr. Bernard Chen Ph.D. University of Central Arkansas Spring 2009.
Chap 7. Register Transfers and Datapaths. 7.1 Datapaths and Operations Two types of modules of digital systems –Datapath perform data-processing operations.
REGISTER TRANSFER & MICROOPERATIONS By Sohaib. Digital System Overview  Each module is built from digital components  Registers  Decoders  Arithmetic.
1 Chapter Four Register Transfer and Micro operations.
Micro Operation. MICROOPERATIONS Computer system microoperations are of four types: - Register transfer microoperations - Arithmetic microoperations -
Charles Kime & Thomas Kaminski © 2008 Pearson Education, Inc. (Hyperlinks are active in View Show mode) Chapter 7 – Registers and Register Transfers Part.
Charles Kime & Thomas Kaminski © 2004 Pearson Education, Inc. Terms of Use (Hyperlinks are active in View Show mode) Terms of Use ECE/CS 352: Digital Systems.
EKT 221 : Chapter 4 Computer Design Basics
1 Outline Bus Transfer Memory Transfer Microoperations.
1 Chapter 7 Henry Hexmoor Registers and RTL. REGISTER TRANSFER AND MICROOPERATIONS Register Transfer Language Register Transfer Bus and Memory Transfers.
Register Transfer Languages (RTL)
Chapter 4 Register Transfer and Microoperations Dr. Bernard Chen Ph.D. University of Central Arkansas Spring 2010.
Exam1 Review Dr. Bernard Chen Ph.D. University of Central Arkansas.
Chapter 1_0 Registers & Register Transfer. Chapter 1- Registers & Register Transfer  Chapter 7 in textbook.
EKT 221 : Digital 2 Computer Design Basics Date : Lecture : 2 hrs.
REGISTER TRANSFER & MICROOPERATIONS By Sohaib. Digital System Overview  Each module is built from digital components  Registers  Decoders  Arithmetic.
ECEG-3202: Computer Architecture and Organization, Dept of ECE, AAU 1 Register Transfer & Microoperations.
1 Register Transfer and Microoperations Acknowledgment: Most of the slides are adapted from Prof. Hyunsoo Yoon’s slides.
1 REGISTER TRANSFER & MICROOPERATIONS. 2 OUTLINES Register Transfer Language Register Transfer Bus and Memory Transfers Arithmetic Microoperations Logic.
UNIT 2 REGISTER TRANSFER AND MICROOPERATIONS
Overview Register Transfer Language Register Transfer
REGISTER TRANSFER AND MICROOPERATIONS
Chapter 4 Register Transfer and Microoperations
Chap 7. Register Transfers and Datapaths
EKT 221 : Digital 2 Serial Transfers & Microoperations
KU College of Engineering Elec 204: Digital Systems Design
Basics of digital systems
Overview Register Transfer Language Register Transfer
Register Transfer and Microoperations
REGISTER TRANSFER LANGUAGE AND DESIGN OF CONTROL UNIT
Computer Organization and Design
BASIC COMPUTER ORGANIZATION AND DESIGN
Control Unit.
Computer Organization and Design
به نام یگانه مهندس هستی معماری کامپیوتر مهدی قدیری
REGISTER TRANSFER LANGUAGE
Computer Architecture and Design Lecture 6
Computer Organization and Design
CSC 220: Computer Organization
By: A. H. Abdul Hafez CAO, by Dr. A.H. Abdul Hafez, CE Dept. HKU
Overview Part 1 - Registers, Microoperations and Implementations
CHAPTER-3 REGISTER TRANSFER LANGUAGE AND MICROOPERATIONS
Instruction execution and ALU
Presentation transcript:

REGISTER TRANSFER AND MICROOPERATIONS • Register Transfer Language • Register Transfer • Bus and Memory Transfers • Arithmetic Microoperations • Logic Microoperations • Shift Microoperations • Arithmetic Logic Shift Unit

Register Transfer Language MICROOPERATION Digital systems are composed of modules that are constructed from digital components, such as registers, decoders, arithmetic elements, and control logic MICROOPERATION: An elementary operation performed during one clock pulse, on the information stored in one or more registers ALU (f) Registers (R) 1 clock cycle operation ex.: shift, count, clear, load, add,...

REGISTER TRANSFER LANGUAGE The internal hardware organization of a digital computer is best defined by specifying : The set of registers it contains and their functions The sequence of microoperations performed on the binary information stored The control that initiates the sequence of microoperations For any function of the computer, a sequence of microoperations is used to describe it ----> Register transfer language - A symbolic language - A convenient tool for describing the internal organization of digital computers - Can also be used to facilitate the design process of digital systems.

REGISTER TRANSFER Designation of a register - a register - portion of a register - a bit of a register Common ways of drawing the block diagram of a register Register Showing individual bits R1 7 6 5 4 3 2 1 0 15 15 8 7 R2 PC(H) PC(L) Numbering of bits Subfields Representation of a transfer(parallel) R2  R1 This statement implies that the hardware is available The outputs of the source must have a path to the inputs of the destination The destination register has a parallel load capability Representation of a controlled(conditional) transfer P: R2  R1 A binary condition(p=1) which determines when the transfer is to occur If (p=1) then (R2  R1)

HARDWARE IMPLEMENTATION OF CONTROLLED TRANSFERS Register Transfer HARDWARE IMPLEMENTATION OF CONTROLLED TRANSFERS Implementation of controlled transfer P: R2 R1 Block diagram Control Circuit P Load R2 Clock n R1 Timing diagram t t+1 Clock Load Transfer occurs here A comma is used to separate two or more operations that are executed at the same time in one clock cycle

Questions Show the block diagram of the hardware that implements the following register transfer statement: yT2: R2R1, R1 R2 Explain the memory operation in each case. A. R2M[AR] B. M[AR]  R3

BUS AND MEMORY TRANSFER Bus and Memory Transfers BUS AND MEMORY TRANSFER Bus is a path(of a group of wires) over which information is transferred, from any of several sources to any of several destinations. From a register to bus: BUS <- R Register A Register B Register C Register D Bus lines Bus lines Load Reg. R0 Reg. R1 Reg. R2 Reg. R3 D D 1 D 2 D 3 z Select E (enable) 2 x 4 w Decoder

MEMORY TRANSFERS Memory read micro-op: DR  M ( DR  M[AR] ) Bus and Memory Transfers MEMORY TRANSFERS Memory unit Read AR Write DR Memory read micro-op: DR  M ( DR  M[AR] ) Memory write micro-op: M  DR ( M[AR]  DR ) Summary of Register Transfer Microoperations A   B Transfer content of reg. B into reg. A AR  DR(N) Transfer content of N bits portion of reg. DR into reg. AR A  constant Transfer a binary constant into reg. A ABUS  R1, Transfer content of R1 into bus A and, at the same time, R2  ABUS transfer content of bus A into R2 AR Address register DR Data register M[AR] Memory word specified by reg. AR DR  M[AR] Memory read operation: transfers content of memory word specified by AR into DR M[AR]  DR Memory write operation: transfers content of DR into memory word specified by AR

ARITHMETIC MICROOPERATIONS Four types of microoperations - Register transfer microoperations - Arithmetic microoperations - Logic microoperations - Shift microoperations * Summary of Arithmetic Micro-Operations R3  R1 + R2 Contents of R1 plus R2 transferred to R3 R3  R1 - R2 Contents of R1 minus R2 transferred to R3 R2  R2’ Complement the contents of R2 R2  R2’+ 1 2's complement the contents of R2 (negate) R3  R1 + R2’+ 1 subtraction R1  R1 + 1 Increment R1  R1 - 1 Decrement

BINARY ADDER Binary Adder Arithmetic Microoperations BINARY ADDER Binary Adder • The subtraction A-B can be carried out by the following steps: Take the 1’s complement of B (invert each bit) Get the 2’s complement by adding 1 Add the result to A Binary Adder-Subtractor

Question Draw the block diagram for the hardware that Implements the following statement: x+yz: AR  AR + BR

Question

ARITHMETIC CIRCUIT Arithmetic Microoperations FA 4x1 MUX FA 4x1 MUX FA Cin S1 S0 A0 X0 C0 S1 FA D0 S0 B0 4x1 Y0 C1 1 MUX 2 3 A1 X1 C1 S1 FA D1 S0 B1 4x1 Y1 C2 1 MUX 2 3 A2 X2 C2 S1 FA D2 S0 B2 4x1 Y2 C3 1 MUX 2 3 A3 X3 C3 S1 FA D3 S0 B3 4x1 Y3 C4 1 MUX 2 3 Cout 1

Question The Arithmetic circuit in last slide has following values for S1, S0 and Cin. In each case determine the value of the output D in terms of the two input registers A and B. What is the corresponding microoperation? S1 S0 Cin Output Microoperation 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1

HARDWARE IMPLEMENTATION OF LOGIC MICROOPERATIONS Question: Draw the digital circuit that performs the following logical operations between reg. A and reg. B(draw the circuit for one bit), then list the circuit function table: (AND, OR, XOR and Complement).

Answer Function table S1 S0 Output -operation 0 0 F = A  B AND B i 1 4 X 1 F i MUX 2 3 Select S 1 S Function table S1 S0 Output -operation 0 0 F = A  B AND 0 1 F = AB OR 1 0 F = A  B XOR 1 1 F = A’ Complement

SHIFT MICROOPERATIONS Shifts - Logical shift : shift in a 0 into the extreme flip-flop - Circular shift : circulates the bits of the register around the two ends - Arithmetic shift : shifts a signed number (shift with sign extension) Left shift -> multiplied by 2 Right shift -> divided by 2 Arithmetic shifts for signed binary numbers - Arithmetic shift-right Sign bit Rn-1 Rn-2 R1 R0 - Arithmetic shift-left Overflow V = Rn-1  Rn-2 Shift Micro-Operations Symbol Description R shl R Shift-left register R R shr R Shift-right register R R cil R Circular shift-left register R R cir R Circular right-shift register R R ashl R Arithmetic shift-left register R R ashr R Arithmetic shift-right register R

Question An 8-bits register R ahs the following value: 11001010, find the value of R after performing the following shifts: Logical shift left Logical shift right Circular shift left Circular shift right Arithmetic shift left Arithmetic shift right

Question

ARITHMETIC LOGIC SHIFT UNIT Shift Microoperations ARITHMETIC LOGIC SHIFT UNIT S3 S2 C i S1 S0 Arithmetic D i Circuit Select 4 x 1 C F i+1 1 MUX i 2 3 Logic E i B i Circuit A i shr A i-1 A shl i+1 S3 S2 S1 S0 Cin Operation Function 0 0 0 0 0 F = A Transfer A 0 0 0 0 1 F = A + 1 Increment A 0 0 0 1 0 F = A + B Addition 0 0 0 1 1 F = A + B + 1 Add with carry 0 0 1 0 0 F = A + B’ Subtract with borrow 0 0 1 0 1 F = A + B’+ 1 Subtraction 0 0 1 1 0 F = A - 1 Decrement A 0 0 1 1 1 F = A TransferA 0 1 0 0 X F = A  B AND 0 1 0 1 X F = A B OR 0 1 1 0 X F = A  B XOR 0 1 1 1 X F = A’ Complement A 1 0 X X X F = shr A Shift right A into F 1 1 X X X F = shl A Shift left A into F