Lightweight recoverable virtual memory

Slides:



Advertisements
Similar presentations
Request Dispatching for Cheap Energy Prices in Cloud Data Centers
Advertisements

SpringerLink Training Kit
Luminosity measurements at Hadron Colliders
From Word Embeddings To Document Distances
Choosing a Dental Plan Student Name
Virtual Environments and Computer Graphics
Chương 1: CÁC PHƯƠNG THỨC GIAO DỊCH TRÊN THỊ TRƯỜNG THẾ GIỚI
THỰC TIỄN KINH DOANH TRONG CỘNG ĐỒNG KINH TẾ ASEAN –
D. Phát triển thương hiệu
NHỮNG VẤN ĐỀ NỔI BẬT CỦA NỀN KINH TẾ VIỆT NAM GIAI ĐOẠN
Điều trị chống huyết khối trong tai biến mạch máu não
BÖnh Parkinson PGS.TS.BS NGUYỄN TRỌNG HƯNG BỆNH VIỆN LÃO KHOA TRUNG ƯƠNG TRƯỜNG ĐẠI HỌC Y HÀ NỘI Bác Ninh 2013.
Nasal Cannula X particulate mask
Evolving Architecture for Beyond the Standard Model
HF NOISE FILTERS PERFORMANCE
Electronics for Pedestrians – Passive Components –
Parameterization of Tabulated BRDFs Ian Mallett (me), Cem Yuksel
L-Systems and Affine Transformations
CMSC423: Bioinformatic Algorithms, Databases and Tools
Some aspect concerning the LMDZ dynamical core and its use
Bayesian Confidence Limits and Intervals
实习总结 (Internship Summary)
Current State of Japanese Economy under Negative Interest Rate and Proposed Remedies Naoyuki Yoshino Dean Asian Development Bank Institute Professor Emeritus,
Front End Electronics for SOI Monolithic Pixel Sensor
Face Recognition Monday, February 1, 2016.
Solving Rubik's Cube By: Etai Nativ.
CS284 Paper Presentation Arpad Kovacs
انتقال حرارت 2 خانم خسرویار.
Summer Student Program First results
Theoretical Results on Neutrinos
HERMESでのHard Exclusive生成過程による 核子内クォーク全角運動量についての研究
Wavelet Coherence & Cross-Wavelet Transform
yaSpMV: Yet Another SpMV Framework on GPUs
Creating Synthetic Microdata for Higher Educational Use in Japan: Reproduction of Distribution Type based on the Descriptive Statistics Kiyomi Shirakawa.
MOCLA02 Design of a Compact L-­band Transverse Deflecting Cavity with Arbitrary Polarizations for the SACLA Injector Sep. 14th, 2015 H. Maesaka, T. Asaka,
Hui Wang†*, Canturk Isci‡, Lavanya Subramanian*,
Fuel cell development program for electric vehicle
Overview of TST-2 Experiment
Optomechanics with atoms
داده کاوی سئوالات نمونه
Inter-system biases estimation in multi-GNSS relative positioning with GPS and Galileo Cecile Deprez and Rene Warnant University of Liege, Belgium  
ლექცია 4 - ფული და ინფლაცია
10. predavanje Novac i financijski sustav
Wissenschaftliche Aussprache zur Dissertation
FLUORECENCE MICROSCOPY SUPERRESOLUTION BLINK MICROSCOPY ON THE BASIS OF ENGINEERED DARK STATES* *Christian Steinhauer, Carsten Forthmann, Jan Vogelsang,
Particle acceleration during the gamma-ray flares of the Crab Nebular
Interpretations of the Derivative Gottfried Wilhelm Leibniz
Advisor: Chiuyuan Chen Student: Shao-Chun Lin
Widow Rockfish Assessment
SiW-ECAL Beam Test 2015 Kick-Off meeting
On Robust Neighbor Discovery in Mobile Wireless Networks
Chapter 6 并发:死锁和饥饿 Operating Systems: Internals and Design Principles
You NEED your book!!! Frequency Distribution
Y V =0 a V =V0 x b b V =0 z
Fairness-oriented Scheduling Support for Multicore Systems
Climate-Energy-Policy Interaction
Hui Wang†*, Canturk Isci‡, Lavanya Subramanian*,
Ch48 Statistics by Chtan FYHSKulai
The ABCD matrix for parabolic reflectors and its application to astigmatism free four-mirror cavities.
Measure Twice and Cut Once: Robust Dynamic Voltage Scaling for FPGAs
Online Learning: An Introduction
Factor Based Index of Systemic Stress (FISS)
What is Chemistry? Chemistry is: the study of matter & the changes it undergoes Composition Structure Properties Energy changes.
THE BERRY PHASE OF A BOGOLIUBOV QUASIPARTICLE IN AN ABRIKOSOV VORTEX*
Quantum-classical transition in optical twin beams and experimental applications to quantum metrology Ivano Ruo-Berchera Frascati.
The Toroidal Sporadic Source: Understanding Temporal Variations
FW 3.4: More Circle Practice
ارائه یک روش حل مبتنی بر استراتژی های تکاملی گروه بندی برای حل مسئله بسته بندی اقلام در ظروف
Decision Procedures Christoph M. Wintersteiger 9/11/2017 3:14 PM
Limits on Anomalous WWγ and WWZ Couplings from DØ
Presentation transcript:

Lightweight recoverable virtual memory ACM SIGOPS, 1993. M. Satyanarayanan, Henry H.Mashburn, Puneet Kumar, David C Streere, James J.Kistler JongMyoung Kim, HyoSeok Lee

+ Lightweight Recoverable Virtual Memory VM subsystem Paging Problem fault-tolerant Application

ACID properties for transactions Transaction is a sequence of operations Atomicity - All operations succeed or all fail Consistency - Data in legal state before and after transaction Isolation - State changes are not visible until transaction commits Durability - If transaction succeeds, it will persist

Recoverable Virtual Memory software library to provide transactional properties for VM in use since early 1990’s Provide flexibility to application in how they use transactions RVM Operations

Recoverable Virtual Memory Minimalism Recoverable Virtual Memory Design challenge Functionality Performance System Level Software Engineering Level Usability Maintenance Lightweight - Ease of learning and use - Minimal impact upon system resource usage

Camelot Predecessor of RVM Support local & distributed nested transactions Flexibility in logging, synchronization, commitment External Page Management - Dirty recoverable addresses are not paged out until commit IPC of Mach

Lessons form Camelot Decreased scalability when compared to AFS - High CPU utilization, ~19% due to Camelot - Paging and context switching overheads Additional programming constraints - All clients must be descendants of Disk Manager task - Debugging is more difficult + Starting a Coda server under a debugger is complex - Clients must use kernel threads + Kernel thread context switches more expensive Increased complexity - Code size, complexity and tight dependence on Mach - Make maintenance and porting difficult - Hard to decide whether a problem lay in Camelot or Mach

LRVM Design Elimination Simplification - Simple layered approach - No nested & distributed transactions - No Concurrency control + serializability + Deadlocks, Starvation … - No control for media failure Elimination

LRVM Design Rationale Portability - Operating System dependence + Small, widely supported, Unix subset of Mach system call + No external page management - External data segment + Small fraction of disk space, files … + RVM’s backing store for recoverable region + Independent of the region’s VM swap space Just Library - Applications and RVM need to trust each other - Each application has its own log, not one per system

Segments and Regions External data segment The contents of regions are copied from external segment to VM during mapping

RVM Primitives Log file Flush() : for Committed No-flush transactions Truncate() : for all Committed transactions

Log Management Format of typical Log record Crash Recovery - traverse log (from tail to head) - build in-memory representation - apply modifications, update disk

Log Management Log Truncation - When truncation is completed - The area marked “Truncation Epoch” will be freed for new one To minimize implementation effort - reuse crash recovery code for truncation

Log Management Incremental Truncation - Uncommitted transactions cannot be written to the segment - uncommitted reference count is incremented as set_ranges() - uncommitted reference count is decremented when committed

Optimization Intra-transaction - Ignore duplicate set-range calls - Coalesce overlapping or adjacent memory ranges Inter-transaction - For no-flush transactions, discard old log records before a log flush

Evaluation : environment TPC-A benchmark - Hypothetical bank - with one or more branches, - multiple tellers per branch, - many customer accounts per branch localized - 70% of the transaction update accounts on 5% of the pages - 25% of the transactions update accounts on a different 15% pages - 5% of the transactions update accounts on remaining 80%

Evaluation : Transactional Throughput Paging

Evaluation : CPU cost per transaction Scalability Evaluation : CPU cost per transaction paging Less frequent Log truncation

Evaluation : Effectiveness of Optimization

Review In 1990s. - Network is slow and not stable - Terminal becomes “powerful” client + 33MHz CPU, 16MB RAM, 100MB hard drive - Mobile Users appeared + 1st IBM Thinkpad in 1992 - We can do work at client without network Is this good paper in current view? - Eliminated things cannot be serviced - Evaluation is just benchmark, not real-world solution - Comparing with Camelot Not RVM Reliability

Heekwon Park,Seungjae Ba다, Joongmoo Choi, Donghee Lee, Sam H Noh Regularities Considered Harmful: Forcing Randomness to Memory Accesses to Reduce Row Buffer Conflicts for Multi-Core, Multi-Bank Systems ACM SIGARCH, 2013. Heekwon Park,Seungjae Ba다, Joongmoo Choi, Donghee Lee, Sam H Noh JongMyoung Kim, HyoSeok Lee

Computing Environment Multi-core Architecture Multi-bank Architecture Main memory is shared shared multiple cores Memory organization - Channel - Ranks - Banks - Rows

Memory Structure Channel DIMM DIMM Components of Main memory Channel Rank Bank Row Channel DIMM DIMM Rank Rank Chip Chip Chip Chip Row Buffer Bank Bank Row 1 Row 2 Rank Rank Row 3

Accessing Memory Conflict !! Delay !! MMU Row 1 Row 2 Row 3 Row 1 Virtual Address(VA) MMU Physical Address(PA) Memory Controller Row Buffer Row 1 Row 2 Row 3 Row Buffer Conflict !! Delay !! Row 1 Row 2 Row 3

Access Experiment There are two variable CL1,CL2 CL1 is Fixed address The address of CL2 is increased A process keeps accessing CL1,CL2 in each iteration If both CL1 and CL2 are exist in the same bank, Then conflict!!

The Result of Access Experiment

How about memory partitioning ? Each core has its own memory bank It can remove conflicts which happen owing to Multi-core Env. Problems reduced Memory parallelism Large consecutive memory space Scalability

How about Randomness ? To avoid buffer conflict, The allocation of page frame is important More Conflict in Multi-core environment

Memory Container Each core has its own Memory space called “Memory container” The size of Memory container is the minimum page number which cover all banks - ex) 12MB

Goal Memory Allocate as sparsely as possible to avoid conflict Each Core allocates page in its memory container

Criticism #1 – Buffer conflict << swap Memory Swap affect performance more than conflict They Use 32GB DDR3 memory Memory Swap might not happen because of sufficient Memory If Memory Swap happened, improvement of elapsed time is minor

Criticism #2 – Memory container Memory container is NOT able to reduce Multi-core buffer conflict Managing Memory container causes another overhead! Memory Partitioning is more practical method in Multi-core Env Each process has its own Memory partition For shared variables

QnA JongMyoung Kim, HyoSeok Lee