DAQ / Trigger Card for HCAL SLHC Readout E. Hazen - Boston University 2010-03-26 E. Hazen - DTC

Schedule Updates Test Beam It was decided at CMS week that we would go ahead with test beam plans. Rough schedule: Apr 15: submit revised clocks (T2) PCB layout for 1- week fabrication and 1-week assembly Can we submit a T3 board by then? May 1: receive stuffed PCBs May 15: working firmware June 1: integrate with miniCTR (here or UMN) June 15: ship to CERN July 1: ready to run This is very tight! Need to plan for help at CERN in June-July to succeed Wu needs to go to China last 2 weeks of April 2010-03-26 E. Hazen - DTC

Technical Progress Communication with MCH / DTC now works with open- source ipmitool software. This should translate (Mike?) quickly into a working C library we can use TTC receiver using commercial parts (not TTCrx) now working. (were using wrong wavelength photodiode) 2010-03-26 E. Hazen - DTC

Backup Slides 2010-03-26 E. Hazen - DTC

Meanwhile, back at BU... CPLD Flash memory JTAG Voltage Regulators (Will omit in Final design) Flash memory JTAG Voltage Regulators TTC Input Spartan-3A FPGA TTC decoding, MCH interface Mounted on NAT-MCH Base board 2010-03-26 E. Hazen - DTC

Legacy DAQ Adapter One i.e. 9U VME module handles two uTCA crates, each with 400MBytes/sec out Crate 1: SLink (2) TTS Carrier PCB (i.e. 9U VME!) SLink64 SLink64 Power (only) from VME Dual RJ-45 Virtex 5/6 FPGA Fiber I/O from 2 uTCA crates SFP+ SFP+ SLink64 Crate 2: TTS SLink (2) SLink64 2010-03-26 E. Hazen - DTC