William Stallings Computer Organization and Architecture 6th Edition Chapter 2 Computer Evolution and Performance

John von Neumann in the 1940s Von Neumann Machines John von Neumann in the 1940s

Von Neumann Machines An example of computer architecture and organization. Used by modern computer as a reference. Von Neumann machines is a computer’s category based on von Neumann architecture (stored-program concept). Data and program can be stored in the same space (memory). Thus, the machines it self can alter either its programs or its internal data.

Von Neumann Machines (cont.) Von Neumann machine must have: A main memory, which stores both data and instructions. An arithmetic and logic unit (ALU) capable of operating on binary data. A control unit, which interprets the instructions in memory and causes them to be executed. Input and output (I/O) equipment operated by the control unit. Control unit interpreting instructions from memory and executing

Structure of von Neumann machine

IAS (Institute for Advanced Studies) 1000 x 40 bit words Binary number 2 x 20 bit instructions Set of registers (storage in CPU) Memory Buffer Register Memory Address Register Instruction Register Instruction Buffer Register Program Counter Accumulator

Structure of IAS – detail

Punched-card processing equipment 1953 - the 701 IBM Punched-card processing equipment 1953 - the 701 IBM’s first stored program computer Scientific calculations 1955 - the 702 Business applications Lead to 700/7000 series

Transistors Replaced vacuum tubes Smaller Cheaper Less heat dissipation Solid State device Made from Silicon (Sand) Invented 1947 at Bell Labs William Shockley et al.

Transistor Based Computers Second generation machines NCR & RCA produced small transistor machines IBM 7000 DEC - 1957 Produced PDP-1

Generations of Computer Vacuum tube - 1946-1957 Transistor - 1958-1964 Small scale integration - 1965 on Up to 100 devices on a chip Medium scale integration - to 1971 100-3,000 devices on a chip Large scale integration - 1971-1977 3,000 - 100,000 devices on a chip Very large scale integration - 1978 to date 100,000 - 100,000,000 devices on a chip Ultra large scale integration Over 100,000,000 devices on a chip

Moore’s Law Increased density of components on chip Gordon Moore - cofounder of Intel Number of transistors on a chip will double every year Since 1970’s development has slowed a little Number of transistors doubles every 18 months Cost of a chip has remained almost unchanged Higher packing density means shorter electrical paths, giving higher performance Smaller size gives increased flexibility Reduced power and cooling requirements Fewer interconnections increases reliability

Growth in CPU Transistor Count

Bus Structure I/O Main Memory I/O Console Module CPU Module Controller OMNIBUS

Intel 1971 - 4004 First microprocessor All CPU components on a single chip 4 bit Followed in 1972 by 8008 8 bit Both designed for specific applications 1974 - 8080 Intel’s first general purpose microprocessor

Speeding it up Pipelining On board cache On board L1 & L2 cache Branch prediction Data flow analysis Speculative execution

Performance Mismatch Processor speed increased Memory capacity increased Memory speed lags behind processor speed

DRAM and Processor Characteristics

Trends in DRAM use

Increase number of bits retrieved at one time Change DRAM interface Solutions Increase number of bits retrieved at one time Make DRAM “wider” rather than “deeper” Change DRAM interface Cache Reduce frequency of memory access More complex cache and cache on chip Increase interconnection bandwidth High speed buses Hierarchy of buses

Pentium Evolution (1) 8080 first general purpose microprocessor 8 bit data path Used in first personal computer – Altair 8086 much more powerful 16 bit instruction cache, prefetch few instructions 8088 (8 bit external bus) used in first IBM PC 80286 16 Mbyte memory addressable up from 1Mb 80386 32 bit Support for multitasking

Pentium Evolution (2) 80486 Pentium Pentium Pro sophisticated powerful cache and instruction pipelining built in maths co-processor Pentium Superscalar Multiple instructions executed in parallel Pentium Pro Increased superscalar organization Aggressive register renaming branch prediction data flow analysis speculative execution

See Intel web pages for detailed information on processors Pentium Evolution (3) Pentium II MMX technology graphics, video & audio processing Pentium III Additional floating point instructions for 3D graphics Pentium 4 Note Arabic rather than Roman numerals Further floating point and multimedia enhancements Itanium 64 bit see chapter 15 See Intel web pages for detailed information on processors

Charles Babbage Institute PowerPC Intel Developer Home Internet Resources http://www.intel.com/ Search for the Intel Museum http://www.ibm.com http://www.dec.com Charles Babbage Institute PowerPC Intel Developer Home