DIGITAL ELECTRONICS II EKT221/4 DIGITAL ELECTRONICS II

Lecturers Dr. Rafikha Aliana A. Raof (RK 20) rafikha@unimap.edu.my Dr. Phak Len Eh Kan (RK 53) phaklen@unimap.edu.my Dr. Norfadila Mahrom (RK 93) norfadila@unimap.edu.my

Schedule / Contact Hours (RK 20) Lectures Wednesday 09.00 – 11:00 DPU 1 Thursday 10:00 – 11:00 DPU 2 Lab Tuesday G1: 10:00 – 12:00 MKM7 G2: 13:00 – 15:00 MKM7

Schedule / Contact Hours (RK 53) Lectures Monday 16:00 – 17:00 DKN 1 & 2 Wednesday 08:30 – 10:30 DK 1 Lab G1: 09:00 – 11:00 MKM7 G2: 11:30 – 13:30 MKM7

Schedule / Contact Hours (RK 93) Lectures Tuesday 10:00 – 11:00 DPU 2 Wednesday 09:00 – 11:00 DPU 2 Lab Thursday G1: 08:30 – 10:30 MKM7 G2: 11:00 – 13:00 MKM7

Textbook

Contents (lecture) Chapter 1 : Registers & Register Transfers Registers, Micro-operations & Implementations Counters, register cells, buses & serial operations Counters Register cell design Multiplexer and bus-based transfers for multiple registers Serial transfers & micro-operations

Contents (lecture) Chapter 2 : Sequencing & Control State machine Datapath & control Algorithmic State Machine (ASM) Hardwired control Microprogrammed control

Contents (lecture) Chapter 3 : Memory Basics Memory definitions Random Access Memory (RAM) Static RAM integrated circuits Arrays of SRAM IC Dynamic RAM IC DRAM types Arrays of DRAM IC

Contents (lecture) Chapter 4 : Computer Design Basics Datapath ALU Barrel Shifter Control Word

Laboratory Altera Quartus II as a CAD Tool development platform

ALTERA DE2 BOARD

Course Objectives (CO) Ability to illustrate a digital system in Register Transfer Language (RTL) form. CO 2 Ability to design sequential systems using Finite State Machine (FSM) and Algorithmic State Machine (ASM) CO 3 Ability to design a digital system with control unit CO 4 Ability to design and simulate using software tool and synthesize a digital design to FPGA device.

Assessment Coursework (Quiz, Assignment, Mini Project) = 30% Test = 20% Final Exam = 50%