Accelerate HD video processing through affordable hardware by Digilent - a National Instruments Company Main points: Streaming HD video from CSI-2 camera over HDMI Video pipeline designed in Vivado, with real-time processing defined in VivadoHLS
Streaming video with Sobel filter applied https://www.youtube.com/embed/NaCF0J5V8_A?rel=0
Real-time edge detection Hardware: Zybo, FullHD Video Source, Display IPs: DVI Source, Sink Interconnect Sobel filter in HLS
Hardware Zybo HDMI Sink, VGA Output
Zynq IP DVI Sink Video-to-AXIS Filter (HLS) AXIS-to-Video DVI Source Software CPU BSD-licensed IP available at github.com/Digilent/vivado-library
Offload software tasks to hardware Why HLS? Code hardware faster Offload software tasks to hardware Selective optimization
Vivado High Level Synthesis C/C++ algorithm Unit test Synthesis Analysis RTL Simulation Export IP
Tasks Understand system requirements Write filter function Write C test-bench C simulation Synthesis Scheduling Binding Control logic Analysis RTL co-simulation Package filter IP Insert HLS IP into Vivado project