CS203 – Advanced Computer Architecture Computer Architecture Simulators

Why use simulators? Designing and fabricating chips are expensive Would take years to test new microarchitecture design Abstract performance/queuing models are simplistic Require a middle-ground Fast, accurate, configurable

Why use simulators? Leverage faster, more flexible S/W development cycles Permits more design space exploration Facilitates validation before H/W becomes available Level of abstraction can be throttled to design task Possible to increase/improve system instrumentation Adapted from SimpleScalar Tutorial

What is an architectural simulator? Tool that reproduces the behavior of a computing device Adapted from SimpleScalar Tutorial

Taxonomy of Simulator Tools Architectural Simulators Functional Trace-driven Exec-driven Interpreters Direct Execution Performance Inst. Schedulers Cycle timers Adapted from SimpleScalar Tutorial

Functional vs Performance Simulators Functional simulators implement the architecture The architecture is what the programmer’s see Performance simulators implement the microarchitecture Model system internals (microarchitecture) Often concerned with time Adapted from SimpleScalar Tutorial

Execution vs Trace-driven Simulation Trace-based simulation: Reads a “trace” of instructions saved from previous execution Easiest to implement, no funcitonal component needed No feedback into trace Execution-driven simulation: Simulator “runs” the program, generating stream dynamically More difficult to implement, many advantages Direct execution: instrumented program runs on host Adapted from SimpleScalar Tutorial

Instruction schedulers vs cycle timers Constraint-based instruction schedulers Simulator schedules instructions based on resource availability Instructions processed one at a time, in order Simpler to implement/modify, generally less detailed Cycle-timer simulators Simulator tracks microarch. State each cycle Many instructions in various stages at any time Simulator state == microarch. State Good for detailed microarchitecture simulation

Functional vs performance simulators Functional simulators implement the architecture Perform the actual execution Implement what programmers see Performance (or timing) simulators implement the microarchitecture Model system resources/internals Measure time Implement what the programmers do not see Adapted from SimpleScalar Tutorial

Application-only vs Full-system Adapted from Multi2Sim Tutorial

The Zen of Simulator Design Design goals will drive which aspects are optimized Adapted from SimpleScalar Tutorial

Example Simulators - CPU SimpleScalar (Wisconsin/Michigan) SESC (UIUC) ESESC (UCSC) gem5 (Michigan, Wisconsin, ARM, etc.) Merger of M5 (Michigan) + GEMS (Wisconsin) Simics (Wind River Systems) Sniper (Ghent) zsim (Stanford/MIT) MARSSx86 (Binghamton)

Example Simulators Temperature Memory Disk Power Reliability Hotspot (Virginia) Memory DramSim2 (Maryland) CACTI (HP) NVSim (PSU) Disk DiskSim (CMU) FlashSim (PSU) Power McPAT (HP) Wattch (Harvard) Reliability VARIUS (UIUC)

Example Simulators Graphical Processing Units (GPU) GPU Energy GPGPU-Sim (UBC) Multi2Sim (Northeastern) MacSim (GaTech) GPU Energy GPUWattch (UT-Austin/Wisconsin/UBC)

Example Simulators Heterogeneous Architectures Datacenters Network Multi2Sim (Northeastern) - CPU/GPU CPU-GPU Simulator (PSU) – CPU/GPU gem5-gpu (Wisconsin) – CPU/GPU Datacenters BigHouse (Michigan) Network DARSIM (MIT) NoC-SIM (TAMU)