Programs, Instructions, and Registers

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Programs, Instructions, and Registers CS/COE 0447 (term 2181) Jarrett Billingsley

Class announcements Project 1 is up! It's due in 4 weeks. Let's have a quick look at what you'll be making. Yep, you'll be able to write this in assembly! 9/5/2017 CS/COE 0447 term 2181

Programs and Instructions 9/5/2017 CS/COE 0447 term 2181

What are they? We just don't know. An instruction is a single, simple operation for the computer to carry out, such as: "Add two numbers together" "Move a number from one location to another" "Go to a different place in the program" "Search a string for a character" A program is a series of these tiny instructions How do we create these instructions? And how does the computer "understand" them? does the computer understand anything? 9/5/2017 CS/COE 0447 term 2181

Machine language and Assembly language Machine language instructions are the patterns of bits that a processor reads to know what to do Assembly language (or "asm") is a human-readable, textual representation of machine language MIPS asm MIPS machine language lw t0, 1200(t1) 100011 01001 01000 0000010010110000 lw t1 t0 1200 add t2, s2, t0 000000 10010 01000 01010 00000 100000 <math> s2 t0 t2 n/a add sw t2, 1200(t1) 101011 01001 01010 0000010010110000 sw t1 t2 1200 9/5/2017 CS/COE 0447 term 2181

Compilers (for more info, take 0449) #include <stdio.h> int main() { printf("hello!"); return 0; } gcc hello.o libc.a Source Code Compiler Object Files Converts C code to machine code. ld Sticks pieces of machine code together to make a program. Linker Executable 9/5/2017 CS/COE 0447 term 2181

Intermediate Language Code Just-in-time Compiler Virtual Machines class Hello { public static void System.out.printl } javac Hello.class Hello.jar 0010100011100000011101101110100110010100010010010100111 Source Code Compiler Intermediate Language Code Machine Code Converts Java code to machine code for a CPU that doesn't exist Can be distributed to end users java JIT Virtual Machine Just-in-time Compiler 9/5/2017 CS/COE 0447 term 2181

How a CPU runs a program Read an instruction. Do what it says. Go to step 1. ...okay there's a little more to it than that. 9/5/2017 CS/COE 0447 term 2181

How a CPU runs a program + "C = A + B" …and repeat! Persistent Storage Control Registers Datapath Processor Memory Persistent Storage Program Program 3 5 8 A B instruction C + "C = A + B" …and repeat! 9/5/2017 CS/COE 0447 term 2181

ISAs 9/5/2017 CS/COE 0447 term 2181

Instruction Set Architecture (ISA) An ISA is the interface that a CPU presents to the programmer. When we say "architecture," this is what we mean. It defines: What the CPU can do (add, subtract, call functions, etc.) What registers it has (we'll get to those) The machine language That is, the bit patterns used to encode instructions It does not define: How to design the hardware! …if there's any hardware at all. 9/5/2017 CS/COE 0447 term 2181

An ISA example: x86 Descended from 16-bit 8086 CPU from 1978 Extended to 32 bits, then 64 Each version can run all programs from the previous version You can run programs written in 1978 on a brand new CPU! So why don't we learn x86 in this course? It can do a lot of things Its machine language is very complex Making an x86 CPU is… difficult. Ultimately, we would waste a ton of time. CS/COE 0447 term 2181 9/5/2017

All three processors run the exact same programs… But they're TOTALLY different on the inside! I’m an x86 CPU! I’m an x86 CPU! VIA Nano AMD Zen I’m an x86 CPU! Intel Core i7 9/5/2017 CS/COE 0447 term 2181

Kinds of ISAs: CISC CISC: "Complex Instruction Set Computer" ISA designed for humans to write asm From the days before compilers! Lots of instructions and ways to use them Complex (multi-step) instructions to shorten and simplify programs x86 is very CISCy. prguitarman.com 9/5/2017 CS/COE 0447 term 2181

Kinds of ISAs: RISC RISC: "Reduced Instruction Set Computer" ISA designed to make it easy to: build the CPU hardware; make that hardware run fast; and write compilers that make machine code. A small number of instructions Instructions are very simple MIPS is very RISCy. MIPS and RISC were the original RISC architectures developed at two universities in California. The research leads were… Patterson and Hennessy! 9/5/2017 CS/COE 0447 term 2181

Popular ISAs today x86 (these days, it’s x86-64 or “x64”) Most laptops/desktops/servers have one (modern x86 CPUs are just RISC CPUs that can read the weird x86 instructions) ARM Almost everything else has one ARMv8 (AArch64) is pretty similar to MIPS! Everything else: Alpha, Sparc, POWER/PPC, z, z80, 29K, 68K, 8051, PIC, AVR, Xtensa, SH2/3/4, 68C05, 6502, SHARC, MIPS... Microcontrollers, mainframes, some video game consoles, and historical/legacy applications. Despite its limited use today, MIPS has been incredibly influential! 9/5/2017 CS/COE 0447 term 2181

The MIPS ISA: Registers 9/5/2017 CS/COE 0447 term 2181

The registers Registers are a kind of small, fast, temporary memory inside the CPU. The CPU can only operate on data in registers. How it gets in there is Thursday's topic! MIPS has 32 registers, and each is 32 bits (one word). The registers are numbered 0 to 31… …but they also have nice names. (I don't like the dollar signs.) (I modified MARS so you don't have to use them.) Let's start with some easy registers. # 1 2, 3 4..7 8..15 16..23 24, 25 26, 27 28 29, 30 31 Name zero at v0, v1 a0..a3 t0..t7 s0..s7 t8, t9 k0, k1 gp sp, fp ra 9/5/2017 CS/COE 0447 term 2181

The s (saved) registers There are 8 saved registers, s0 through s7. These are kinda like… local variables inside a function. s0 = 3; s1 = 5; s2 = s0 + s1; li s0, 3 li s1, 5 add s2, s0, s1 Here are your first MIPS instructions! li stands for "load immediate." What does it look like it does? add, uh, makes coffee. ¬_¬ Just like in Java, C, whatever: the destination is on the left. 9/5/2017 CS/COE 0447 term 2181

The t (temporary) registers There are ten temporary registers, t0 through t9. These are used for temporary values – values that are used briefly. For example, say we had a longer expression: s4 = (s0 + s1 – s2) * s3 What does algebra say about what order we should do this in? add t0, s0, s1 sub t0, t0, s2 mul s4, t0, s3 9/5/2017 CS/COE 0447 term 2181

Thinking like a compiler Writing asm is a different way of programming than you're used to. To make the transition easier, try to reduce your cognitive load. Cognitive load is "the set of ideas you have to keep in your mind to perform some task." High-level languages (HLLs) reduce cognitive load by hiding the machine code, using a compiler to write it for you. You can do the same thing: think about how to write a program in e.g. C, and then turn that into asm! c=a+b add c, a, b add s2, s0, s1 9/5/2017 CS/COE 0447 term 2181