Study Report for Brushless DC (BLDC) Motors DRAFT By Dean Hu 3/21/2014

Introductions to Motors Types of Motors AC Motors INDUCTION MOTOR SYNCHRONOUS MOTOR DC Motors Various wound field motors Permanent Magnet (PMDC) MOTOR Brushed DC (BDC) Motors Brushless DC (BLDC) Motors Sensored & Sensorless

BLDC Motors Typical Block Diagram

BLDC Motors Sensorless & Sensored Control

BLDC Motors Detailed Block Diagram

BLDC Motor Controller HOLTEK HT66FM5240 – Block Diagram

BLDC Motor Controller HT66FM5240 – Application Circuits

BLDC Motor Controller HT66FM5240 – Features VDD/AVDD: 4.5V ~ 5.5V Package types: 20/28-pin SSOP Logic (CPU/Peripheral) fSYS = 32kHz (LIRC) ~ 20MHz (HIRC) by Internal Oscillators Multi-mode operations: NORMAL, SLOW, IDLE & SLEEP Flash (program) / RAM (data) / EEPROM (data) Memories Watchdog Timer & 16-bit/10-bit Periodic Type Timer Modules (PTM) 16-bit Capture Timer Module (CAPTM) for Motor Protection 3-channel 10-bit PWM w/ Complementary Outputs Bidirectional I/O pins, UART I/F, & I2C I/F Pin-shared External Interrupts / Time-Based Interrupt

BLDC Motor Controllers HT66FM5240 Features Analog 8-channel 12-bit A/D Converter (ADC) One (1) OPAmp for Current Detection 4 Comparators - Comparator 0 has interrupt function One (1) D/A Converter (DAC) Low Voltage Reset (LVR) Low Voltage Detect (LVD)

HD66FM5240 D.C. Characteristics

HT66FM5240 A.C. Characteristics

HT66FM5240 / Analog A/D Converter (ADC), AVDD = 5V (Typ.) Characteristics

HT66FM5240 - ADC ADC Structure ADC Operation There are two ways to initiate an A/D Converter conversion cycle: using the ADSTS bit, and use the PWM interrupt signal Limitation: the minimum value of permissible 12-bit A/D converter clock period, tADCK, is 0.8ms

HT66FM5240 - ADC A/D Conversion Timing Diagram

HT66FM5240 / Analog D/A Converter (DAC): VDD = VLVR (3.15V) ~ 5.5V Characteristics

HT66FM5240 / Analog Operational Amplifier (OPAmp/OPA): VDD = 3.3V (Typ.) Characteristics

HT66FM5240 / Analog Comparator: VDD = 5V (Typ.) Electrical Characteristics

HT66FM5240 Low Voltage Detector (LVD) - monitor the power supply voltage, VDD LVD Operation Low Voltage Detector function operates by comparing VDD with a pre-specified voltage level VLVD, namely, 3.6V, stored in the LVDC register

HT66FM5240 Power on Reset (POR) Electrical Characteristics

HT66FM5240 Operating Modes and System Clocks – HIRC & LIRC

HT66FM5240 Watchdog Timer Timer Module (TM) To prevent program malfunctions or sequences from jumping to unknown locations, due to certain uncontrollable external events such as electrical noise Timer Module (TM) Multi-purpose timing units Periodic Type TM (PTM) 5 OP Modes/Functions

HT66FM5240 - PTM Block Diagram (for n=0)

HT66FM5240 Capture Timer Module (CAPTM) To detect and measure input signals’ pulse widths and periods, used for Motor Control purposes 2 modes: Compare Mode and Capture Mode Block Diagram

HT66FM5240 - CAPTM Noise Filters for H1/H2/H3/CTIN input signals Typical Waveforms for CAPNFT=0 & CATNFS = 0 (CAPTC1 Register b4 & b3)

HT66FM5240 Noise filter for NFIN input pin, source of 16-bit PTM, TM0, capture circuit

HT66FM5240 BLDC Motor Control Circuit PWMO (output of PWM counter): adjusts PWM duty to control the output motor power thus controlling the motor speed Mask circuit: determines which PWM modulation signals are enabled or disabled for motor speed control Dead-Time Insertion circuit: ensures the upper and lower Gate Driver Transistor Pairs are not enabled simultaneously Staggered circuit: forces all the outputs to off status if the software detects an error condition Motor Protect circuit: includes functions for motor stall condition, over current protection, external edge triggered Pause pin, external level trigger Fault pin, etc. Hall Sensor Decoder circuit: is a six-step system which can be used to control the motor direction; the motor forward, backward, brake and free functions are controlled by the HDCD/HDCR registers

HT66FM5240 BLDC Motor Control Block Diagram

HT66FM5240 – BLDC Control PWM Counter Control Circuit PWM Block & Timing Diagrams

HT66FM5240 – BLDC Control Block Diagram for Mask, Dead Time, Staggered, and Polarity Functions

HT66FM5240 – BLDC Control Mask Function 3 modes: Normal / Brake / Motor Protect Normal Mode: motor speed control method is determined by the PWMS/MPWE bits in the MCF register H/W Mask Mode S/W Mask Mode Brake Mode: the Brake Mode has the highest priority. When activated, the external Gate Driver Transistor Pair Top arm will be off and the Bottom arm will be on Motor Protect Mode: when activated, the external Gate Driver Transistor Pair can select the brake, where the top arm is off and the bottom arm is on, or select free running where the top and bottom arm are both off

HT66FM5240 – BLDC Control Dead Time Function The actual dead time value can be setup to be within a value from 0.3μs to 5μs, which is selected by the application program Timing Diagram

HT66FM5240 – BLDC Control Staggered Function BLDC motor control circuit is designed for default N-type transistor pairs: a "1" value will switch the transistor on and a "0"value will switch it off Polarity Function – Controlled by PLC register Default of output pins GAT/GAB/GBT/GBB/GCT/GCB is high impedance

HT66FM5240 – BLDC Control Hall Sensor Decoder Interfaces to the Hall Sensors in the BLDC motor for directional and speed control Noise Filter, Delay Function, & Motor Control Drive Signals Block Diagram

HT66FM5240 – BLDC Control Hall Sensor Noise Filter Filters out the effects of noise generated by the large switching currents of the motor driver Block Diagram

HT66FM5240 – BLDC Control Hall Sensor Delay Function Implement a signal phase forward or phase backward operation Block Diagram

HT66FM5240 – BLDC Control Delay Function Timing

HT66FM5240 – BLDC Control Motor Control Drive Signals Controlled using the HDCR, HDCD registers and a series of HDCT registers, namely, HDCT0 ~ HDCT11 HDCR: direction is determined using FRS bit while brake can be controlled using BRKE bit HDCT0 ~ HDCT5 (6 bits) registers are used for the Motor Forward table HDCT6 ~ HDCT11 (6 bits) registers are used for the Motor Backward table

HT66FM5240 – BLDC Control Motor Drive Signal Timing Diagram – Forward Direction

HT66FM5240 – BLDC Control Motor Drive Signal Timing Diagram – Backward Direction

HT66FM5240 – BLDC Control Motor Protection Function Motors need to be protected from the problems of excessive drive currents, motor stalling, etc to reduce motor damage or for safety reasons Over Current Protection, Stall Detection, Turn Off Motor using Software Block Diagram

HT66FM5240 – BLDC Control Motor Protection Function Protection Function Control

HT66FM5240 – BLDC Control Motor Protection Over Current Protection Internal OPA with a gain of 10, high speed (2ms) 10-bit ADC, 8-bit DAC, and a Comparator To avoid false triggering by noise amplified by OPA, the Fault Mode is needed. Motor Stall Detection For 3-phase BLDC applications with Hall Sensors, the 16-bit CAPTM can be used to monitor INT0A, INT0B and INT0C for rotor speed detection Stall detect mechanism use the Pause Mode

HT66FM5240 Over Current Detection (OCD) Block Diagram

HT66FM5240 - OCD The over-current functional block includes an OPA, 12-bit ADC, 8-bit DAC, and Comparator If an over-current situation is detected then the motor external drive circuit can be switched off immediately to prevent damage to the motor Two kinds of interrupts are generated for OCD A/D Converter interrupt - Int_AHL_Lim Comparator 0 interrupt - Int_Is

HT66FM5240 I2C Interface Block Diagram

HT66FM5240 UART Interface Features Full-duplex, asynchronous communication 8 or 9 bits character length Even, odd or no parity options One or two stop bits Baud rate generator with 8-bit prescaler Parity, framing, noise and overrun error detection 2-byte deep FIFO Receive Data Buffer Transmit and receive interrupts

HT66FM5240 Interrupts External Interrupt 0/1 Noise Filtered Input Interrupt Comparator Interrupt Time Base Interrupt Multi-function Interrupt: 7 Multi-function interrupts from Hall Sensor interrupts, A/D interrupts, PWM Module interrupts, CAPTM Interrupts, TM Interrupts A/D Converter Interrupt PWM Module Interrupts CAPTM Module Interrupt TM Module Interrupt EEPROM Interrupt LVD Interrupt I2C Interrupt UART Interrupt Interrupt Wake-up Function

HT66FM5240 I/O Pin Structures Generic Input/Output Structure

HT66FM5240 – I/O Pins A/D Input/Output Structure

Some Thoughts on HT66FM5240 Single supply: 5V Internal LDO for 3.3V => OPAmp & Logic (?) OPAmp is capable of driving 600W and 100pF, input offset can be reduced to ±2mV by calibration Voltage Reference, such as bandgap Trimming capability for HIRC & LIRC (embedded oscillators) ADC might be 12-bit SAR, or using SD ADC for higher resolution (?) DAC might be R-2R (HT66FM5230 uses R-2R DAC) Comparators have hysteresis