COMPUTER ARITHMETIC Arithmetic with Signed-2's Complement Numbers Multiplication and Division Floating-Point Arithmetic Operations Decimal Arithmetic Unit Decimal Arithmetic Operations

SIGNED MAGNITUDEADDITION AND SUBTRACTION Addition: A + B ; A: Augend; B: Addend Subtraction: A - B: A: Minuend; B: Subtrahend (+A) + (+B) (+A) + (- B) (- A) + (+B) (- A) + (- B) (+A) - (+B) (+A) - (- B) (- A) - (+B) (- A) - (- B) +(A + B) - (A + B) +(A - B) - (A - B) - (B - A) +(B - A) Operation Magnitude When A>B When A<B When A=B Add Subtract Magnitude Hardware Implementation Bs B Register AVF Complementer M(Mode Control) Output Carry Input Carry E Parallel Adder S As A Register Load Sum

SIGNED 2’S COMPLEMENT ADDITION AND SUBTRACTION Hardware B Register Complementer and Parallel Adder V Overflow AC Algorithm Subtract Add Minuend in AC Subtrahend in B Augend in AC Addend in B AC  AC + B’+ 1 V  overflow AC  AC + B V  overflow END END

MULTIPLICATION  2i * Ai ) Multiplication: B * A; B: Multiplicand; A: Multiplier; P: Partial Product Multiplication of Unsigned Positive Numbers A = An-1An-2 ... A0 B = Bn-1Bn-2 ... B0 P = B * A n-1 = B * (  2i * Ai ) i=0 = An-1 * (B2n-1) + An-2 * (B2n-2) + ... + A0 * (B20) B shifted left B shifted left B shifted left n-1 bits n-2 bits 0 bits = A Or B shifted (n-1) bits to the left P = An-1*(B2n-1 * 20) + An-2*(B2n-1 * 2-1) + ... + A0*(B2n-1 * 2-(n-1)) B2n-1 B2n-1 shifted right B2n-1 shifted right 1 bit (n-1) bits

EXAMPLE Multiplier in Q 0 00000 10011 101 Q0 = 1; add B 10111 Multiplication EXAMPLE Multiplicand B=10111 E A Q SC Multiplier in Q Q0 = 1; add B First partial product Shift right EAQ Second Partial Product Q0 = 0; shift right EAQ Fifth partial product Final Product in AQ = 0110110101 0 00000 10011 101 10111 0 10111 0 01011 11001 100 1 00010 0 10001 01100 011 0 01000 10110 010 0 00100 01011 001 0 11011 0 01101 10101 000

SIGNED MAGNITUDE MULTIPLICATION Bs Hardware B Register Sequence Counter Complementer and Parallel Adder As Qn Qs 0 E AC Q Register EAQ B <- Multiplicand B Q <- MultiplierA Algorithm As,Qs <- Qs  Bs A <- 0, E <- 0 SC <- n-1 = 0 =1 Q0 EA <- A + B shr EAQ SC <- SC+1 = 0 END Product in AQ =0 SC

BOOTH MULTIPLICATION ALGORITHM FOR SIGNED 2’S COMPLEMENT Multiplier Strings of 0’s: No addition; Simply shifts Strings of 1’s: String of 1’s from mp to mq: 2p+1 - 2q Example 001110 (14) -> p = 3, q = 1 001110 = 23+1 - 21 M * 14 = M24 - M21 Algorithm [1] Subtract multiplicand for the first least significant 1 in a string of 1’s in the multiplier [2] Add multiplicand for the first 0 after the string of 1’s in the multiplier [3] Partial Product does not change when the multiplier bit is identical to the previous bit 110010 = -24 + 22 - 21 = -16 + 4 - 2 = -14 subtract subtract 24 21 Add 22

BOOTH ALGORITHM FOR SIGNED 2’S COMPLEMENT Multiplication BOOTH ALGORITHM FOR SIGNED 2’S COMPLEMENT B <- Multiplicand B Q <- Multiplier A AC <- 0 Q-1 <- 0 SC <- n 10 01 Q0Q-1 ? Q-1 : shifted out bit on shr of Q 11 00 AC<-AC+B’+1 AC <- AC + B ashr(AC&Q) SC <- SC + 1  0 SC ? =0 END

EXAMPLE OF BOOTH MULTIPLIER Multiplication EXAMPLE OF BOOTH MULTIPLIER B = 10111 Br=-9*-13=QR Q0Q-1 B’+1=01001 AC Q Q-1 SC 10 11 01 00 Initial Subtract B ashr Add B 00000 10011 0 101 01001 00100 11001 1 100 00010 01100 1 011 10111 11001 11100 10110 0 010 11110 01011 0 001 00111 00011 10101 1 000

ARRAY MULTIPLIER A = a1a0: Multiplier B = b1b0: Multiplicand b1 b0 Multiplication ARRAY MULTIPLIER A = a1a0: Multiplier B = b1b0: Multiplicand C = B * A = c3c2c1c0 b1 b0 a1 a0 a0b1 a0b0 a1b1 a1b0 c3 c2 c1 c0 b1 b0 a0 b1 b0 a1 HA HA C S C S c3 c2 c1 c0

ARRAY MULTIPLIER 4-BIT X 3-BIT Multiplication ARRAY MULTIPLIER 4-BIT X 3-BIT a0 a1 b3 b2 b1 b0 b3 b2 b1 b0 Addend Augend 4-bit Adder Sum and Carry Outputs a2 b3 b2 b1 b0 Addend Augend 4-bit Adder Sum and Carry Outputs c6 c5 c4 c3 c2 c1 c0

Division DIVISION A / B = Q + R A: Dividend; B: Divisor; Q: Quotient; R: Remainder Divisor B = 10001, B’+ 1 = 01111 E A Q SC Dividend: shl EAQ add B’+1 E=1 Set Q0=1 Add B’+1 E=0; Q0=0 add B restore remainder neglect E remainder in A quotient in Q 01110 00000 5 0 11100 00000 01111 1 01011 1 01011 00001 4 0 10110 00010 1 00101 1 00101 00011 3 0 01010 00110 0 11001 00110 10001 1 01010 2 0 10100 01100 1 00011 1 00011 01101 1 0 00110 11010 0 10101 11010 1 00110 11010 0 00110 11010

FLOWCHART OF DIVIDE OPERATION Division FLOWCHART OF DIVIDE OPERATION Dividend in AQ Divisor in B Qs As  Bs SC<- n - 1 shl EAQ E EA  A + B’+1 EA  A+B’+1 A  A+B’+1 1 E 1 A B A<B E 0(A<B) A B Q0  1 EA  A+B EA  A+B DVF  1 DVF  0 EA  A+B SC  SC-1  0 SC END (Divide overflow) END (Quotient in Q Remainder in R)

FLOATING POINT ARITHMETIC OPERATIONS F = m x re where m: Mantissa r: Radix e: Exponent Registers for Floating Point Arithmetic Bs B b BR Parallel Adder and Comparator E Parallel Adder As A1 A a AC Qs Q q QR

FLOATING POINT ADD AND AUBTRACT Floating Point Arithmetic FLOATING POINT ADD AND AUBTRACT =0  0  0 BR AC CHECK FOR =0 a<b a>b a:b Align Mantissa AC<-BR shr A a <- a+1 shr B b <- b+1 add op sub sub add As<-A’s op 1 1 As  Bs As  Bs + or - of mantissa EA<-A+B’+1 EA<-A+B A<-A’+1 As<-A’s E 1  0 =0 A Normalization A1 AC<-0 E shl A a<-a+1 shr A A1<-E a<-a+1 END

FLOATING POINT MULTIPLICATION Floating Point Arithmetic FLOATING POINT MULTIPLICATION BR <- Multiplicand QR <- Multiplier =0 BR  0 =0 QR  0 AC <- 0 a <- q a <- a+b a <- a-bias Multiply mantissa (finxed point multiplication) shl AQ a <- a-1 A1 1 END (Product is in AC)

FLOATING POINT DIVISION Floating Point Arithmetic FLOATING POINT DIVISION BR<-Divisor AC<-Dividend =0 BR  0 =0 AC  0 QR <- 0 Qs <- As + Bs Q<-0 SC<-n-1 divide by 0 EA <- A+B’+1 1 E A>=B A<B A <- A+B shr A a <- a+1 A <- A+B a <- a+b’+1 a <- a+bias q <- a Divide Magnitude of mantissa as in fixed point numbers

BCD ADD BCD digit < 10 BCD digit + BCD digit + carry =< 19 BCD Arithmetic BCD ADD BCD digit < 10 BCD digit + BCD digit + carry =< 19 Binary Sum BCD Sum K Z8 Z4 Z2 Z1 C S8 S4 S2 S1 Decimal 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 1 0 0 0 1 0 0 0 0 1 0 2 0 0 0 1 1 0 0 0 1 1 3 0 0 1 0 0 0 0 1 0 0 4 0 0 1 0 1 0 0 1 0 1 5 0 0 1 1 0 0 0 1 1 0 6 0 0 1 1 1 0 0 1 1 1 7 0 1 0 0 0 0 1 0 0 0 8 0 1 0 0 1 0 1 0 0 1 9 0 1 0 1 0 1 0 0 0 0 10 0 1 0 1 1 1 0 0 0 1 11 0 1 1 0 0 1 0 0 1 0 12 0 1 1 0 1 1 0 0 1 1 13 0 1 1 1 0 1 0 1 0 0 14 0 1 1 1 1 1 0 1 0 1 15 1 0 0 0 0 1 0 1 1 0 16 1 0 0 0 1 1 0 1 1 1 17 1 0 0 1 0 1 1 0 0 0 18 1 0 0 1 1 1 1 0 0 1 19

BCD ADDER If we can convert Binary Sums to BCD Sum , BCD Arithmetic BCD ADDER If we can convert Binary Sums to BCD Sum , we can use a binary adder to add two BCD numbers SUM =< 9 BCD Sum = Binary Sum BCD Carry = Binary Carry 19 >= SUM > 9 BCD Sum = Binary Sum + 0110 BCD Carry = Carry(Binary Sum + 0110) 4-bit Binary Add 1 K Take next higher digit Z8 1 1 Z4 done ? 1 END Z2 BCD Sum<-Sum + 0110 BCD C<-Carry(BCD Sum) BCD Sum = Sum BCD C<-Carry(Sum)

BCD ADDER HARDWARE BCD Arithmetic Addend Augend Carry Out 4-bit Binary Addr K Carry In Z8 Z4 Z2 Z1 BCD Carry 0 1 1 0 4-bit Binary Adder S8 S4 S2 S1

DECIMAL ARITHMETIC OPERATIONS Addition - Identical to the BCD addition - 9’s complement and 10’s complement are identical to 1’s complement and 10’s complement, respectively