AT91 Power Management This training module describes the Power Management options provided by the AT91 family of microcontrollers. These options address key power issues of embedded systems.

Power Management Options The ARM7TDMI processor is industry leader in MIPS/Watt The AT91 microcontroller embeds controller to provide advanced power management : Power Saving (PS) controller AT91x40 Family Power Management Controller (PMC) AT91M63200, AT91M42800A Advanced Power Management Controller (APMC) AT91M55800A The ARM7TDMI processor is industry leader in MIPS/Watt. The AT91 microcontroller embeds Power Management Controllers, which provide idle mode and disable clocks on unused peripherals.

PS : Features Optimizes the power consumption of the device Controls the CPU and Peripheral clocks Stop the CPU clock and enter Idle Mode The ARM Core Clock is disabled and waiting for the next interrupt The peripheral clocks are enabled and the PDC transfers are still possible. Enables and disables the peripheral clocks individually The AT91x40 Series features a Power Saving, which enables optimization of power consumption. The PS controls the processor and peripheral clocks. One control register enables the user to stop the ARM7TDMI processor clock and enter Idle mode. One set of registers enables and disables the peripheral clocks individually.

PMC : Features Optimizes the power consumption of the device Controls the clocking elements: Oscillator and PLLs System and Peripheral clocks Three operating modes: Normal mode Idle mode The ARM Core Clock is disabled and waiting for the next interrupt The peripheral clocks are enabled and the PDC transfers are still possible Slow clock mode The device core and peripheral run in Slow Clock Mode The AT91M42800A features a Power Management Controller (PMC), which optimizes the power consumption of the device. The PMC controls the clocking elements such as the oscillator and the PLLs, and the system and peripheral clocks. Three operating modes are supported by the APMC and offer different power consumption levels and event response latency times.

PMC : Block Diagram The PMC consists of the following elements: The Oscillator, which provides the Slow Clock at 32768Hz, The PLLA, which provides a low-to-middle frequency clock range, The PLLB, which provides a middle-to-high frequency clock range, The system clock controller, The peripherals clock controller, The master clock output controller .

APMC : Features (1/2) Optimizes power consumption of the device and the complete system Controls the clocking elements: Oscillators PLL Core clock Peripheral clocks Controls the system power supply The AT91M55800A features an Advanced Power Management Controller (APMC), which optimizes both the power consumption of the device and the complete system. The APMC controls the clocking elements such as the oscillators and the PLL, the core and the peripheral clocks, and has the capability to control the system power supply.

APMC : Features (2/2) Five operating modes: Normal mode Idle mode The ARM core clock is enabled Used peripheral clocks are enabled Idle mode The ARM Core Clock is disabled and waiting for the next interrupt The peripheral clocks are enabled and the PDC transfers are still possible Slow clock mode The device core and peripherals run in Slow Clock Mode Standby mode Combination of Slow clock and Idle mode, very low power consumption Power down mode Main power supply is turned off until a programmable edge on the wake-up signal or a programmable RTC Alarm occurs Five operating modes are supported by the APMC and offer different power consumption levels and event response latency times.

APMC : Block Diagram The APMC consists of the following elements: The RTC Oscillator, which provides the Slow Clock at 32768Hz, The Main Oscillator, The Phase Lock Loop, The ARM processor clock controller, which allows entry to the idle mode, The peripherals clock controller, which conserves the power consumption of unused peripherals, The master clock output controller and the shut-down logic, which controls the main power.