Diego Real, IFIC Spain, KM3NeT Electronics Coordinator

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Presentation transcript:

The electronics readout and data acquisition system of the KM3NeT Neutrino Telescope Diego Real, IFIC Spain, KM3NeT Electronics Coordinator VLVnT13 - Very Large Volume Neutrino Telescope Workshop 2013 Stockholm, 5 August 2013

KM3NeT Collaboration 40 Institutes 14.5 m 100 m Junction box ~60 m Link cables Junction box IFIC, Valencia UPV, Valencia UPC, Barcelona 40 Institutes VLVnT13 Stockholm , 05-08-2013 2 2

KM3NeT Neutrino Telescope 640 strings 18 DOM/string 11520 DOMs Volume: ~5 km3 ~60 m 100 m 14.5 m Link cables 2500 m depth Junction box 12,800 DOMs in the deep sea at 3-5 km depth with point-to-point connection to shore VLVnT13 Stockholm , 05-08-2013 3 3

Deployment Of KM3NeT Detection Units Link cables 2500 m depth Junction box 640 string with optical sensors in the deep sea at 3-5 km depth VLVnT13 Stockholm , 05-08-2013 4 4

KM3NeT Digital Optical Module Link cables 2500 m depth Junction box 31 x 3” PMT 19 Lower Hemisphere 12 Upper Hemisphere Contains Read Out and Control/Command Electronics for PMT and instrumentation VLVnT13 Stockholm , 05-08-2013 5 5

Electronics Boards In The KM3NeT-DOM Cooling System ~60 m 100 m 14.5 m Link cables 2500 m depth Junction box Power board Central Logic Board 31 PMTs Octopus boards PMT Bases VLVnT13 Stockholm , 05-08-2013 6 6

KM3NeT PMT Bases 2500 m depth 14.5 m 100 m Junction box ~60 m <105 dimensions in mm ~60 m 100 m 14.5 m Link cables 2500 m depth Junction box VLVnT13 Stockholm , 05-08-2013 7 7

PMT Bases Features Adjustable HV (800-1400V) Low power (4,5mW) Link cables 2500 m depth Junction box Adjustable HV (800-1400V) Low power (4,5mW) ASIC with pre-amplifier and discriminator Connection to the signal collection boards done by flexible PCB LVDS output signal VLVnT13 Stockholm , 05-08-2013 8 8

PMT Bases Schematics 2500 m depth 14.5 m 100 m Junction box ~60 m Link cables 2500 m depth Junction box 3 inch PMTs PMT-base Photons LVDS Comparator Pre- amp Switch + Sense Circuit 6.5us Pulse generator Analog Buffer Driver Current controlled Oscillator Threshold DAC Cockroft Walton HV I2C Decoder + ID Control I2C Opamp Current Sense HV DAC ID (OTP) Clock Feedback PROMiS_v2 3V3 supply Discrete Components CoCo_v2 ETEL bases with the chips VLVnT13 Stockholm , 05-08-2013 9 9

COCO And PROMIS Chips 2500 m depth 14.5 m 100 m Junction box ~60 m Link cables 2500 m depth Junction box VLVnT13 Stockholm , 05-08-2013 10

Octopus Board ~60 m 100 m 14.5 m Link cables 2500 m depth Junction box Collect PMT bases signals and conduce them to the Central Logic Board Delivers power for individual PMT HV base Provide I2C communication with the Central Logic Board VLVnT13 Stockholm , 05-08-2013 11

Power Board Convert 12V from the external break Out Box to voltages for the DOM Isolated from the CLB in order to avoid ElectroMagnetic Interferences VLVnT13 Stockholm , 05-08-2013 12

Specs For The KM3NeT Central Logic Board Specifications ~60 m 100 m 14.5 m Link cables 2500 m depth Junction box Readout 31 TDC’s with 1 ns resolution (See David’s talk) “Knowledge” of absolute time (1 ns resolution) – White Rabbit Data pushed from PMTs to Shore Station I2C: PMT-HV, Threshold, Compass, Tilt Other IO: Temp, Nanobeacon, Acoustics, Piezo Firmware must be reconfigurable Low Power Low Cost Part of a scalable system (with respect to the complete detector) Highly reliable VLVnT13 Stockholm , 05-08-2013 13

Time Synchronization And Data Transfer WHITE RABBIT ~60 m 100 m 14.5 m Link cables 2500 m depth Junction box Main features of a White Rabbit network: Transparent, high-accuracy synchronization Low-latency, deterministic data delivery Designed for high reliability Control and timing International collaboration Based on well-known technologies Open Hardware and Open Software Ethernet + Determinism & Reliability + Synchronization VLVnT13 Stockholm , 05-08-2013 14

Embedded Soft Microprocessor 1.- Open source – portable 2- Well documented 3.- White Rabbit uses it 4.- Wihsbone compatible Embedded Best at: deterministic execution configurable memory bus small and fast LM32 @ 62.5 Mhz No operating system Lower power consumption VLVnT13 Stockholm , 05-08-2013 15

Bus System WHISHBONE Wishbone is intended as a "logic bus“ Open source It does not specify electrical information or the bus topology Instead, the specification is written in terms of "signals", clock cycles, and high and low levels Open source The Wishbone Bus is used by many designs in the OpenCores project Possible interconnections: Point to Point Shared bus Pipelined Crossbar switch -> The one selected (Used also in WRPC) VLVnT13 Stockholm , 05-08-2013 16

Block Diagram Of FPGA Functionalities Link cables 2500 m depth Junction box IP/UDP Packet Buffer Stream Selector (IPMUX) 31 TDCs Start Time Slice UTC & Offset counter since Fifo TDC0 Time Slice Start RxPacket Buffer 64KB RxPort 1 31 PMTs RxPort 2 Rx Stream Select Fifo TDC 30 Rx_mac2buf Rx_buf2data Flags RxPort_m Management & Control S Pause Frame Management & Config. State Machine ADC Fifo Hydrophone TxPacket Buffer 32KB TxPort 1 Management & Control TxPort 2 S Tx_pkt2mac Tx_data2buf Tx Stream Select Multiboot Flags TxPort_m S Management & Control Nano Beacon S WB Crossbar (1x8) M M M S M M M M M M Debug LEDs 2nd CPU LM32 M SPI S S MEM S WB Crossbar (3x2) S M UART S I2C I2C S GPIO S Data UTC time & Clock (PPS, 125 MHz) Control Point to Point interconnection SPI Flash Debug RS232 Temp Compass Tilt Wishbone bus Xilinx Kintex-7 FPGA VLVnT13 Stockholm , 05-08-2013 17

Stream Selector (IPMUX) PMT Signal Path ~60 m 100 m 14.5 m Link cables 2500 m depth Junction box IP/UDP Packet Buffer Stream Selector (IPMUX) 31 TDCs Start Time Slice UTC & Offset counter since Fifo TDC0 Time Slice Start RxPacket Buffer 64KB RxPort 1 31 PMTs RxPort 2 Rx Stream Select Fifo TDC 30 Rx_mac2buf Rx_buf2data Flags RxPort_m Management & Control S Pause Frame Management & Config. State Machine ADC Fifo Hydrophone TxPacket Buffer 32KB TxPort 1 Management & Control TxPort 2 S Tx_pkt2mac Tx_data2buf Tx Stream Select Multiboot Flags TxPort_m S Management & Control Nano Beacon S WB Crossbar (1x8) M M M S M M M M M M Debug LEDs 2nd CPU LM32 M SPI S S Xilinx Kintex-7 MEM S WB Crossbar (3x2) S M UART S I2C I2C S GPIO S Data UTC time & Clock (PPS, 125 MHz) Control Point to Point interconnection SPI Flash Debug RS232 Temp Compass Tilt Wishbone bus VLVnT13 Stockholm , 05-08-2013 18

Instrumentation Data Path Link cables 2500 m depth Junction box IP/UDP Packet Buffer Stream Selector (IPMUX) 31 TDCs Start Time Slice UTC & Offset counter since Fifo TDC0 Time Slice Start RxPacket Buffer 64KB RxPort 1 31 PMTs RxPort 2 Rx Stream Select Fifo TDC 30 Rx_mac2buf Rx_buf2data Flags RxPort_m Management & Control S Pause Frame Management & Config. State Machine ADC Fifo Hydrophone TxPacket Buffer 32KB TxPort 1 Management & Control TxPort 2 S Tx_pkt2mac Tx_data2buf Tx Stream Select Multiboot Flags TxPort_m S Management & Control Nano Beacon S WB Crossbar (1x8) M M M S M M M M M M Debug LEDs 2nd CPU LM32 M SPI S S Xilinx Kintex-7 MEM S WB Crossbar (3x2) S M UART S I2C I2C S GPIO S Data UTC time & Clock (PPS, 125 MHz) Control Point to Point interconnection SPI Flash Debug RS232 Temp Compass Tilt Wishbone bus VLVnT13 Stockholm , 05-08-2013 19

Instrumentation AES3 (Audio Engineering Society) protocol I²C (Inter Integrate Circuit) bus ~60 m 100 m 14.5 m Link cables Junction box Hydrophone Piezo Nanobeacon Compass sensor + Tilt-meter sensor Temperature sensors (located on the CLB) HV base 3” PMT configuration (across the Octopus boards) VLVnT13 Stockholm , 05-08-2013 20

Booting The KM3NeT-DOM Multiboot FPGA SPI flash memory 21 VLVnT13 Stockholm , 05-08-2013 21

KM3NeT On Shore Station Shore Sub Sea Servers may be 192.16.x.1 Server2 192.16.x.2 Server n 192.16.y.z Servers may be used for storage and Pre-processing Switch Server Server Buffers Server Server 10MHz GPS PPS WR Switch WR Switch Shore Sub Sea DOM 1 DOM 2 DOM 16 DOM 12798 DOM 12799 DOM 12800 Each DOM synchronizes to the absolute time (using White Rabbit) Each DOM receives a look up table with IP addresses while configuring the detector. Fixed Ip stored on the nodes can be also used All DOMs start at an absolute point in time which was communicated via a command over the White Rabbit network All DOMs start their first time-slice at exactly the same time All data is IP/UDP formatted and passed to the IP number corresponding to the time slice After ‘n’ time slices, first PC is again selected to process the data Time Slice Time Slice IP IP Address 1 Time Slice 192.16.x.1 IP 2 192.16.x.2 : : n 192.16.y.z VLVnT13 Stockholm , 05-08-2013 22

On Shore Station Data Path ReferenceClock Start PTP Broadcast Buffer Buffer Tx SFP Buffer Time Stamp t1 DOM Buffer SFP Optical Network Time Stamp t4 Rx t4 Stop1 DOM j: DDMTD SFP Time Stamp t4 Rx t4 Stop2 j: DDMTD DOM SFP Time Stamp t4 Rx t4 Stop3 DOM j: DDMTD SFP Time Stamp t4 Rx t4 Stop4 Shore Station interface j: DDMTD Main Electrical Optical Cable (MEOC) 40 km long in KM3NeT-Fr/Gr 100 km long in KM3NeT-It VLVnT13 Stockholm , 05-08-2013 23

Conclusions Readout/DAQ of KM3Net – DOM using: White Rabbit protocol: Ethernet + Synchronization (1 ns) + Determinism 31 TDC’s with 1 ns resolution 31 low power HV PMT bases with preamplifier and discriminator Data read out parallelized on Field Program Gate Array Control/Configuration performed in an embedded processor No Operating System used Embedded instrumentation for calibration Optical 1Gb/s Ethernet link KM3NeT Onshore station centralises the read out – control – configuration of the telescope VLVnT13 Stockholm , 05-08-2013 24

THANKS FOR YOUR ATTENTION! VLVnT13 Stockholm , 05-08-2013 25