Paolo Branchini INFN RomaTre on behalf of the KLOE2 collaboration DAQ and Slow control system for the KLOE-2 Experiment Paolo Branchini INFN RomaTre on behalf of the KLOE2 collaboration

Talk layout KLOE original daq and slow control system architecture KLOE-2 upgrades Casting the upgrades in the original architecture

DAQ and trigger architecture

Slow control original schematic and dataflow

Slow control architecture The EMC and DC slow control system is based on CAENET bus. A VME CPU is in charge of monitoring through the CAENET bus DC and EMC. We have developped a custom system for LET, HET, CCALT, IT, QCALT. All the fe board of these detector have their own ethernet interface. This system is based on TCP/IP. The original system and the new one have been succesfully integrated at the level of the slow control server (kloeslow).

The new FE Slow and DAQ system are based on GIBs FE interface Up to 8 Gastone boards - 1024 readout channels 16 copper serial links@100Mbit/s each (double edge technique) for Gastone readout On line input data processing Data integrity check, data decoding, zero suppression 16 SPI interfaces for FE setting, monitoring and control Trigger/DAQ / slow control interfaces 1 single bidirectional optical link @2Gb/s Trigger interface (unidirectional- GIB input) First level trigger decoding Second level trigger decoding Data transmission to DAQ DAQ interface (unidirectional – GIB output) First level event building and DATA format, and data transmission Slow control interfaces (bidirectional) Receive, decode and execute control commands Receive , decode and execute FPGA parameters setting Console for local operations: RS232,USB, Eth FE power section Single line for each FE board IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 58, NO. 4, AUGUST 2011 P. Branchini et al.

While the new back end DAQ is based on a custom optical concentrator Up to 16 input optical links. VME 64X compliant. A CPU reads data from the optical concentrator and delivers them to the on-line farm through TCP/IP. Journal of instrumentation volume 8 april 2013 T04004 P. Branchini et al.

Slow control and debug software for the new detectors Complete low-level GIB control is possible for experts by dedicated tool. R/O status . SPI test. DAQ rate test. Scaler or TDC config (for QCALT). An example: Expert tool for GASTONE Settings. This tool has been interfaced with the DB of the detector.

KLOE Slow Control Old Detectors (Vme based) running on l2mt12 New Detectors (TCP/IP based) running on Kloeslow

OLD DETECTORS : OPTIMIZATION Improved the switching ON/OFF/STBY procedure of the whole DC. Gained a factor of 100 in the speed. Removed bugs affecting the HV of EMC, that didn’t allow to remove part of the apparatus from the configuration. Added the offset consideration for the various boards while settings the thresholds of the EMC (LV EMC slow control). Improved the speed of the monitor process for the DAQ Slow control. Actually the cycle needs less than 2 minutes for being completed. Gained a factor 2 -3 .

NEW DETECTORS : Low and High Energy Tagger HET Scintillator Voltage Sipm Voltage Monitoring of Low Energy Tagger

New Detectors: Inner Tracker Layer Status Monitor (TCP/IP based) Layer User Console

New Detectors: Inner Tracker (2) GIB Panel Status Imeters Current Monitor

New Detectors: Inner Tracker (3) Inner Tracker Temperature Monitor Inner Tracker GAS Monitor

New Detectors: QCALT GIB STATUS GENERAL MONITORING QCALT Board Fiber Lock Monitor QCALT Board Communication Monitor QCALT HV Status QCALT Temperature Monitor FEA/FEB

New Detectors: QCALT (2) GIB DETAILED MONITORING

New Detectors: QCALT (3) Configuration Procedure from XML Database Calibration Procedure

CCALT DETAILED MONITORING: Voltage of Silicon PhotoMultipliers New Detectors: CCALT CCALT DETAILED MONITORING: Voltage of Silicon PhotoMultipliers

System Upgrade Requirements: It must efficiently collect data from the new detector. Old detector front-end and DAQ hardware must be reused. Strategy: The front-end L2 CPU have been changed and the switch technology as well (2008-2009). This has increased the data throughput from the original 50 Mbyte/s to 100 MB/s on disk allowing us to collect data at more than 20 KHz of sustained trigger rate on disk when fe channels are zero suppressed and occupancy due to machine background is below 1%.

New detectors (1) LET and CCALT exploit the original DAQ chain, their integration in the system was straightforward. HET was the first new detector to be integrated and it was our playground. Its daq sytem is split in two crates 20 m far from each other. Those crates are managed by a CPU in charge of initialiazing the FE electronics. A VIRTEX5 module collects data and stores them in a memory buffer. The sw running on the CPU retrives data from there and delivers them to the on-line farm through tcp/ip. Front end architecture is different. Nevertheless the new detector data stream must be built together with the old detector ones at the farm level.

New detectors (2) Qcal and Inner tracker data must be collected and they must cope with a 20 Khz trigger rate. Moreover single event data collection latency should be less than the DAQ dead time. Front end architecture is different. The new detector data stream must be built together with the old detector ones at the farm level.

HET bunch identification TDC resolution is 625 ps/count We clearly identify contiguous bunch. Bunch-buch time distance is 2.72 ns (fit result)

The Inner Tracker readout The front end is based on the gastone chip a custom chip from KLOE collaboration. The gastone chip delivers 1 bit/channel info. All gastone chip parameters are downloaded during initialization via optical fibre links. During run serial links download front end data to GIB (General Interface Boards) gastone front end converted data. IT detector readout consists of 20 kchannels to read 1 bit each channel. IT is partitioned in 2 read-out chains one per side consisting of 12 optical links each Since we exploit 2 Gbps links 1.5 ms are necessary to deliver data trough optical links.

The Qcal readout The front end is based on KLOE custom electronics (TDC FPGA based with 1 ns resolution) All TDC parameters are downloaded during initialization via optical fibre links. During run serial links download front end data to GIB (General Interface Boards). Qcal detector readout consists of 1980 TDC channels. IT is partitioned in 3 read-out chains. 44 optical links for all the QCALT.

IT Chain Read Out Inner tracker module Gastone front end board GENERAL READOUT The GIB boards collect data from front end and deliver them through an optical link to a general purpose VME board. The VME board hosts up to 16 optical link 1 Gb/s each and builds a packet out of the collected data. 2 Gb/s optical links we have 16 links on the VME receiving card so we have 32 Gbps aggregate throughput on the optical links collected by a 6U VME board The data are collected from the VME board by a MVME6100 and delivered to the kloe farm on line

Initialization through optical links Initialization and slow control occurs through optical links. We have used chipscope to debug and monitor the Initialization. A snapshop of data delivery from front-end is shown in this slide

Data delivery through optical links We have done an extensive use of chipscope to debug the front-end DAQ. Here we show data flowing through the first 8 links to the data collection board.

VME interface During data taking the VME interface has been monitored. In this slide a snapshot of the data transmission over the VME bus has been shown. The VME interface supports BLT MBLT 2eVme 2eSST data cycles. We read 8 btye @ 12.5 MHz therefore 100 Mbyte/s as top speed per single chain.

IT reconstructed cluster position in cosmic triggered events

QCAL monitoring plots Debugging is going on…….

Conclusions The DAQ for the new KLOE-2 detectors is ready. The KLOE-2 DAQ system has been succesfully upgraded. Several bugs have been tracked down and removed. We have some margin of improvements but at the moment our attention is focused on system debugging and maintenance due to the man power issues.