Dima Maneuski, Advances in rad-hard MAPS 2016, Birmingham

Slides:



Advertisements
Similar presentations
HV/HR-CMOS sensors (A quick overview from personal perspective, which is biased on ATLAS strips work) V. Fadeyev SCIPP / UCSC SiD mtg at SLAC,
Advertisements

The ATLAS Pixel Detector
SPiDeR  First beam test results of the FORTIS sensor FORTIS 4T MAPS Deep PWell Testbeam results CHERWELL Summary J.J. Velthuis.
1 Improved Non-Ionizing Radiation Tolerance of CMOS Sensors Dennis Doering 1 *, Michael Deveaux 1, Melissa Domachowski 1, Michal Koziel 1, Christian Müntz.
Semi-conductor Detectors HEP and Accelerators Geoffrey Taylor ARC Centre for Particle Physics at the Terascale (CoEPP) The University of Melbourne.
1 Digital Active Pixel Array (DAPA) for Vertex and Tracking Silicon Systems PROJECT G.Bashindzhagyan 1, N.Korotkova 1, R.Roeder 2, Chr.Schmidt 3, N.Sinev.
Fully depleted MAPS: Pegasus and MIMOSA 33 Maciej Kachel, Wojciech Duliński PICSEL group, IPHC Strasbourg 1 For low energy X-ray applications.
1 An introduction to radiation hard Monolithic Active Pixel Sensors Or: A tool to measure Secondary Vertices Dennis Doering*, Goethe University Frankfurt.
ALICE Inner Tracking System at present 2 2 layers of hybrid pixels (SPD) 2 layers of silicon drift detector (SDD) 2 layers of silicon strips (SSD) MAPs.
The ALICE Forward Multiplicity Detector Kristján Gulbrandsen Niels Bohr Institute for the ALICE Collaboration.
1 Radiation Hardness of Monolithic Active Pixel Sensors Dennis Doering, Goethe-University Frankfurt am Main on behalf of the CBM-MVD-Collaboration Outline.
CMOS Activities K. Arndt, D. Bortoletto, T. Huffman, J.J. John, K. Kanisauskas, R. Nickerson, R. Plackett, L. Vigani With many thanks to V. Fadeyev (SCIPP.
AMS HVCMOS status Raimon Casanova Mohr 14/05/2015.
Technology Overview or Challenges of Future High Energy Particle Detection Tomasz Hemperek
A. Rivetti Villa Olmo, 7/10/2009 Lepix: monolithic detectors for particle tracking in standard very deep submicron CMOS technologies. A. RIVETTI I.N.F.N.
Irfu saclay Development of fast and high precision CMOS pixel sensors for an ILC vertex detector Christine Hu-Guo (IPHC) on behalf of IPHC (Strasbourg)
The development of the readout ASIC for the pair-monitor with SOI technology ~irradiation test~ Yutaro Sato Tohoku Univ. 29 th Mar  Introduction.
Radiation hardness of Monolithic Active Pixel Sensors (MAPS)
MIMO  3 Preliminary Test Results. MIMOSTAR 2 16/05/2007 MimoStar3 Status Evaluation of MimoStar2 chip  Test in Laboratory.
Trends in MONOLITHIC DETECTORS and ADVANCED CMOS MANUFACTURING W. Snoeys ESE Seminar October 14 th 2014 PH-ESE-ME,
RD53 1.  Full/large demonstrator chip submission ◦ When: 2016 A.Early 2016: If chip must have been fully demonstrated in test beams for TDRs to be made.
Ideas on MAPS design for ATLAS ITk. HV-MAPS challenges Fast signal Good signal over noise ratio (S/N). Radiation tolerance (various fluences) Resolution.
Hybrid CMOS strip detectors J. Dopke for the ATLAS strip CMOS group UK community meeting on CMOS sensors for particle tracking , Cosenors House,
Comparison of the AC and DC coupled pixels sensors read out with FE-I4 electronics Gianluigi Casse*, Marko Milovanovic, Paul Dervan, Ilya Tsurin 22/06/20161.
H.-G. Moser Max-Planck-Institut für Physik Future Vertex Detectors in HEP Projects: LHC (upgrade 2018+) Belle 2 (upgrade 2018+) ILC/CLIC (2020+)
Low Mass, Radiation Hard Vertex Detectors R. Lipton, Fermilab Future experiments will require pixelated vertex detectors with radiation hardness superior.
Pixel Sensors for the Mu3e Detector Dirk Wiedner on behalf of Mu3e February Dirk Wiedner PSI 2/15.
Further improvement of the TC performances Marie GELIN on behalf of IPHC - Strasbourg and IRFU – Saclay Investigation of a new substrate (High Resistivity)
The SuperB Silicon Vertex Tracker Abstract : The SuperB project aims to build an asymmetric e+ - e- collider capable of reaching.
TCT measurements of HV-CMOS test structures irradiated with neutrons I. Mandić 1, G. Kramberger 1, V. Cindro 1, A. Gorišek 1, B. Hiti 1, M. Mikuž 1,2,
1 /28 LePIX – Front End Electronic conference – Bergamo 25 May 2011 – Piero Giubilato LePIX – monolithic detectors in advanced CMOS Collection electrode.
Alternative tracking technologies: Depleted CMOS Marcos Fernández García IFCA-CSIC & Departamento de Física Moderna (Universidad de Cantabria) [also visiting.
KIT – Universität des Landes Baden-Württemberg und nationales Forschungszentrum in der Helmholtz-Gemeinschaft Status of HVCMOS Developments.
The pixel research activities at SDU
Valerio Re INFN Pavia and University of Bergamo
Ivan Peric, Christian Kreidl, Peter Fischer University of Heidelberg
LePIX: first results from a novel monolithic pixel sensor
10-12 April 2013, INFN-LNF, Frascati, Italy
Silicon eyes for radio-labeled biological samples
Overview and perspectives of HR&HV CMOS
Development of HV/HR CMOS sensors for the ATLAS ITk
Characterization and modelling of signal dynamics in 3D-DDTC detectors
Introduction HV HR CMOS ATLAS R&D
FBK / INFN Roma, November , 17th 2009 G. Darbo - INFN / Genova
Design and Characterization of a Novel, Radiation-Resistant Active Pixel Sensor in a Standard 0.25 m CMOS Technology P.P. Allport, G. Casse, A. Evans,
Digital readout architecture for Velopix
ATLAS Pixel Detector for HL-LHC
IBL Overview Darren Leung ~ 8/15/2013 ~ UW B305.
ICHEP02 Chris Parkes ALICE m2 Pixels+Drift+Strips LHCb m2
CMOS pixel sensors & PLUME operation principles
ATLAS strip CMOS Development of Sensors for possible use in Silicon Strip region at phase II Aggressive time schedule – drives choices Three phase programme.
HR-HV CMOS activities and plans at Glasgow
HV-MAPS Designs and Results I
Upgrade of the ATLAS MDT Front-End Electronics
HVCMOS sensor technology R&D
Characterization of a Pixel Sensor for ITK
R. Casanova, E. Cavallaro, F. Forster, S. Grinstein, I. Peric,
The SuperB Silicon Vertex Tracker
SVT Issues for the TDR What decisions must be taken before the TDR can be written? What is the mechanism for reaching those decisions How can missing information.
Ivan Peric for ATLAS and CLIC HVCMOS R&D and Mu3e Collaborations
Valerio Re (INFN-Pavia) on behalf of the RD53 collaboratios
Rita De Masi IPHC-Strasbourg on behalf of the IPHC-IRFU collaboration
CMOS Pixel Sensors for ILC Related Vertexing & Tracking Devices Christine Hu-Guo (on behalf of the PICSEL team of IPHC-Strasbourg) Contents Overview.
SCIENTIFIC CMOS PIXELS
HVCMOS Detectors – Overview
Radiation hardness of fully depleted
SVT detector electronics
TCAD Simulation and test setup For CMOS Pixel Sensor based on a 0
3D sensors: status and plans for the ACTIVE project
R&D of CMOS pixel Shandong University
Presentation transcript:

Depleted Monolithic Active Pixel Sensors for ATLAS Upgrade https://indico.cern.ch/event/640107/ Depleted Monolithic Active Pixel Sensors for ATLAS Upgrade Dima Maneuski et. al.

Dima Maneuski, Advances in rad-hard MAPS 2016, Birmingham Presentation plan Presentation Plan Motivation for the ATLAS ITk Performance requirements CMOS options CMOS technologies Current CMOS developments AMS LFoundry TJ Conclusions 19 July 2017 Dima Maneuski, Advances in rad-hard MAPS 2016, Birmingham

Dima Maneuski, Advances in rad-hard MAPS 2016, Birmingham Motivation ATLAS Inner Tracker (ITk) for HL-LHC: ~200 m2 silicon Radiation tolerant to expected fluencies Can operate with 25 ns bunch crossing and increased pile up Increased granularity Reduced material budget Low cost modules with high production throughput Potential alternative to planar silicon sensors is commercial CMOS Cost: Several vendors High volume Large wafers (8-12 inch) Performance: Radiation hardness Thinner charge collection layer High S/N Time scale: expected switch on time around 2024 19 July 2017 Dima Maneuski, Advances in rad-hard MAPS 2016, Birmingham

Performance requirements Converging on the CMOS sensor for the ITk Pixel Outer Layer 4 1.5x1015 neq/cm2 and 80 Mrad TID Hitrates up to 2 MHz/mm2 (peak) Timing: < 25 ns Efficiency: > 95% after irradiations Pixel size: < 50 um Chip size like ATLAS-1 Pixel FE chip CMOS to be integrated into quad and double chip modules like Hybrid Pixel Module Interface compatible with Hybrid Quad Module towards powering and readout Credit: A. Gaudiello et al., IWORID’17 19 July 2017 Dima Maneuski, Advances in rad-hard MAPS 2016, Birmingham

Dima Maneuski, Advances in rad-hard MAPS 2016, Birmingham CMOS options Capacitively coupled pixel detector (CCPD) CMOS pixel + FE chip Thinner devices Flip-chip simplification Capacitive coupling Diode + Preamp Front End chip Monolithic Active Pixel Sensor (MAPS) Collecting diode + readout + processing electronics on wafer No flip-chip Thin devices Increased granularity Lower analog power (for small pixel capacitance designs) Diode + Preamp + Processing electronics 19 July 2017 Dima Maneuski, Advances in rad-hard MAPS 2016, Birmingham

Dima Maneuski, Advances in rad-hard MAPS 2016, Birmingham CMOS technologies Fabrication foundries under consideration AMS (180 and 350 nm) ESPROS (150 nm, High Resistivity option) Global Foundry (130 nm, High Resistivity option) LFoundry (150 nm, High Resistivity option) XFAB (180 nm, SOI option) ST Microelectronics (160 nm) Toshiba (130 nm) Tower Jazz (180 nm, High Resistivity Epi option) IBM (130 nm) ON Semiconductor (180 nm) 19 July 2017 Dima Maneuski, Advances in rad-hard MAPS 2016, Birmingham

Dima Maneuski, Advances in rad-hard MAPS 2016, Birmingham Current developments Vendor Sensor name Technology node Size (mm2) # pixels Pixel size (um2) AMS H18_CCPD 180 nm 2.2x4.4 Various 25x25, 33x125, 25x125, 25x350 LFoundry LF_CCPD 150 nm 5x5 32x140 33x125 H35_DEMO 350 nm 18.5x24.4 16x300, 23x300 50x250 LF_CPIX 9.5x10 34x168 TowerJazz TJ investigator 5x5.7 134 matrices 20x20 -> 50x50 Monopix 36x142 TJ_MALTA 18x18 512x512 36x36 TJ_Monopix 10x18 256x512 36x40 ATLASPix / MuPix8 21.3x22.6 2 matrices 56x56 ATLASPix 10x10 5 matrices 40x100, 40x60, 40x250 CCPD* Monolithic structures Monolithic + periphery 2nd generation *Capacitively coupled pixel detector (CCPD) 19 July 2017 Dima Maneuski, Advances in rad-hard MAPS 2016, Birmingham

Dima Maneuski, Advances in rad-hard MAPS 2016, Birmingham AMS H18 CCPD AMS H18 CCPD (CCPDv4) Standard 10 Ω·cm substrate Irradiated to 1.3e14 and 5e15 neq / cm2 Developed gluing process Pion test beams Hit efficiency 97.6% (irradiated) to 99.7% (unirradiated) Efficiency performance comparable to planar Silicon Credit: M. Benoit et. al. arXiv:1611.02669 19 July 2017 Dima Maneuski, Advances in rad-hard MAPS 2016, Birmingham

Dima Maneuski, Advances in rad-hard MAPS 2016, Birmingham AMS H35 Demo AMS H35 Demo Monolithic sensor demonstrator Different pixel flavours Different substrate resistivities Efficiency before irradiations demonstrated 99.1% 99% of charge collected within 2 BC Credit: S. Terzo et al., JINST 12 (2017) no.06, C06009 Credit: A. Gaudiello et al., IWORID’17 19 July 2017 Dima Maneuski, Advances in rad-hard MAPS 2016, Birmingham

What’s next in AMS process? AMS H18 ATLASPIX Drop-in solution for outer layers Fully integrated Large fill factor monolithic design 180 nm AMS HV CMOS Default resistivity is 20 Ω cm Triple well process Roadmap: pATLASpix-1a/b/c prototype, February 2017 pATLASpix-2 prototype, August 2017 Periphery blocks pATLASpix-3 prototype, February 2018 Periphery + full matrix ATLASpix final design, 2018 19 July 2017 Dima Maneuski, Advances in rad-hard MAPS 2016, Birmingham

Dima Maneuski, Advances in rad-hard MAPS 2016, Birmingham LFoundry LF_CCPD LFoundry LF_CCPD L-Foundry 150 nm process Resistivity of wafer: >2000 Ω·cm Chip size 5 x 5 mm 33 x 125 um pixel size 24 x 114 pixels, 3 pixel flavours R/O coupled to FE-I4 and stand alone Subpixel decoding demonstrated Irradiated to 50 Mrad TID Irradiated to 1.2e15 neq / cm2 Credit: T. Hirono et. al. 1.2e15 neq / cm2 Credit: D. Maneuski et. al. 19 July 2017 Dima Maneuski, Advances in rad-hard MAPS 2016, Birmingham

Dima Maneuski, Advances in rad-hard MAPS 2016, Birmingham LFoundry CPIX LFoundry CPIX (LF_CPIX) L-Foundry 150 nm process Resistivity of wafer: 2000 Ω·cm High fill factor Chip size 9.5 x 10 mm Pixel size 50 x 250 um 36 x 158 pixels, three pixel flavours Process to thin down to 100 um developed Better leakage current More radiation tolerant Credit: L. Vigani et. al. Credit: T. Hirono et. al. 19 July 2017 Dima Maneuski, Advances in rad-hard MAPS 2016, Birmingham

Dima Maneuski, Advances in rad-hard MAPS 2016, Birmingham LFoundry Monopix LFoundry Monopix Monolithic: amplifier, discriminator, ToT, readout Designed to satisfy noise, time, speed requirements Resistivity of wafer: >2000 Ω·cm Pixel 50 x 250 um 129 x 36 pixels @ 40 MHz clock Backside processing Credit: T. Wang et. al. 2017 JINST 12 C01039 Credit: I. Caicedo et. al. 19 July 2017 Dima Maneuski, Advances in rad-hard MAPS 2016, Birmingham

What’s next in LF process? LFoundry ATLASPix Technology LFA15 (150 nm) Different pixel sizes Different matrices (1 CCPD and 5 monolithic) and test structures Resistivities: 100 Ω·cm, 500-1k Ω·cm, 1.9k Ω·cm and 3.8k Ω·cm 4-well HVCMOS process Different Readout concepts 19 July 2017 Dima Maneuski, Advances in rad-hard MAPS 2016, Birmingham

TowerJazz Investigator Sr90 MIP TowerJazz Investigator Designed as part of the ALPIDE development for the ALICE ITS upgrade Emphasis on small fill-factor and low capacitance Epitaxial layer on high resistivity substrate Many variations of pixel size and layout Signal Amplitude [e] Time [ns] Credit: C. Riegel et. al. Credit: D. Maneuski et. al. 19 July 2017 Dima Maneuski, Advances in rad-hard MAPS 2016, Birmingham

What’s next in TJ process? TJ_Malta Full matrix 512x512 pixels Active area 18 x 18 mm2 Hit memory in active matrix All hits are Asynchronously transmitted over high- speed bus to EOC logic No clock distribution over active matrix to minimize power and digital-analog cross-talk TJ_MonoPix Full matrix 512x256 pixels Active area 18 x 10 mm2 Hit memory in active matrix (2 flip-flop per pixel) Synchronous column drain architecture Hit address asserted to bus with 40MHz token 6 bit TOT coding at end of column 19 July 2017 Dima Maneuski, Advances in rad-hard MAPS 2016, Birmingham

Dima Maneuski, Advances in rad-hard MAPS 2016, Birmingham Conclusions Conclusions Demonstration continues to show CMOS technology could be a viable candidate for the ATLAS ITk upgrade CMOS devices from different foundries generally shown to operate after the expected radiation damage at the mid/outer layer of the ATLAS ITk Many performance issues found in first iterations of designs were addressed in the full scale demonstrators General consensus to work on Monolithic CMOS sensor for the outer layer of the ITk for the TDR 2017 Aim at the drop-in module solution CMOS developments have huge potential in fields outside particle physics 19 July 2017 Dima Maneuski, Advances in rad-hard MAPS 2016, Birmingham

Thank you for your attention Any questions? 19 July 2017 Dima Maneuski, Advances in rad-hard MAPS 2016, Birmingham