Greatest Common Divisor

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Presentation transcript:

Greatest Common Divisor Using PicoBlaze By VIKRAM & CHETHAN Advisor: Gandhi Puvvada

Introduction The greatest common divisor of two positive integers a and b is the largest divisor common to a and b. PicoBlaze is an 8-bit micro processor softcore IP. It is sometimes easier and efficient to implement sequential functions in software running on a processor.

Goal of this lab To design Greatest Common Divisor Core using Picoblaze and integrate it with the TOP design on Nexys 3 board. We will be converting the GCD mealy FSM into sequential code. To get familiar with writing Assembly language code to Program the Picoblaze Interface Picoblaze with FPGA fabric logic. To get to know polling method to wait for user input and take appropriate action in software

FSM in Assembly We need to program each state separately in assembly Start, Step and Ack are the external Control signals used here to exercise sequencing control.

Single Stepping, Start, and Acknowledge In this lab we will be using single-stepping pulse (SCEN) to single-step in each stage/state Subtract Stage Multiply Stage We will be using Start_Ack_Pulse to exit from the following states Initial Stage Done Stage We are interested in the Start/Ack pulse and Step pulse in particular

Interrupts or Polling Either way, we do not want to use the pushbutton with bounces nor the DPB pulse. The DPB pulse is very long and we do not want to perform multiple steps instead of single stepping. So we use the SCEN pulse. The SCEN pulse generated by the debouncer design is active just for 1 clock cycle which is 10ns wide. It is too small for the PicoBlaze to realize it either in polling mode (used in this lab) or in interrupt mode (not used in this lab). It takes Picoblaze two cycles to execute each instruction, and the interrupt request pulse must be held high for the entire minimum 2-clocks period. However we did not use the Picoblaze Processor Interrupt mechanism here. Instead we use program-driven polling method to recognize “Start”, “Step”, and “Ack”.

Why not use Picoblaze interrupt When Picoblaze interrupt is used the entire state, which is stepped using the BtnU pulse, needs to be written in Interrupt Service Routines. We are keeping the design simple in this lab and using polling method instead of Interrupts. We register the Start/Ack pulse (one-clock-wide SCEN pulse), similarly the step pulse from the BtnU (again one-clock-wide SCEN pulse) so that registered pulse stays (does not disappear) until it is recognized by the software polling process. On noting that the flip- flop is set, your software will clear the register. It is necessary so that you would not serve one request multiple times.

Comparison of interface between top and the core designs in the case of the two designs Top design without any Picoblaze Top design with core implemented in Picoblaze port_id Ain Ain A A Core design Hardware -based Core design Picoblaze -based Bin B Bin B in_port out_port GCD GCD I_count 6’b000000 I_count Start/Ack (BtnL) Step (BtnU) State State

Registering & Acknowledging of the Start_Ack pulse Vdd Start_Ack_Pulse_Reg D Q (To PicoBlaze) Start_Ack_Pulse CLK (SCEN) RESET start_ack (From PicoBlaze)

Extract of ee201_GCD_top.v always@(posedge(BtnU_Pulse),posedge(step_ack)) begin if(step_ack)begin BtnU_Pulse_Reg <= 1'b0; end else begin BtnU_Pulse_Reg <= 1'b1;

Registering & Acknowledging the Step request BTNU_Pulse Vdd BtnU_Pulse_Reg D Q (To PicoBlaze) BtnU_Pulse CLK (SCEN) RESET Step_ack (From PicoBlaze)

Extract of ee201_GCD_top.v always@(posedge(Start_Ack_Pulse),posedge(start_ack)) begin if(start_ack)begin Start_Ack_Pulse_Reg <= 1'b0; end else begin Start_Ack_Pulse_Reg <= 1'b1;

Short-lived requests need to be registered whether you are polling them or being interrupted by them. And registered request needs to cleared! Notice the similarity between the three designs Registering the request and clearing the request – extract from page 43 KCPSM6_User_Guide_30Sept14.pdf

Why should you not use DPB The DPB pulse is very long. It so long that it could cause the system to step over a single state several millions of times even when the button is just pressed once. 84 milliseconds = 8.400,000 clocks of 10ns. If DPB is 250 milliseconds, it has 25 million clocks. Even if the polling routine and consequent service take 50 clocks (25 instructions), we are taking about half-million services for one operation of the PB!

Assemble your. psm file, synthesize the top, download the Assemble your .psm file, synthesize the top, download the .bit file and test. You should be able to replicate the steps on the side reproduced from page 5 of the ee254_GCD_rev4.pdf