WBS 1.03 Readout Systems Specifications, Design and Acceptance Gary Varner University of Hawaii

Gary Varner, Belle II Directors Review (Pre CD-2/3) Talk Outline Performance requirements Technical status Remaining R&D Summary 16-17 January 2013 Gary Varner, Belle II Directors Review (Pre CD-2/3) 2

Common Readout: Structural Requirements Operate within Belle-II Trigger/DAQ environment >= 30kHz L1 Gbps fiber Tx/Rx COPPER backend Super-KEKB clock/timing 16-17 January 2013 Gary Varner, Belle II Directors Review (Pre CD-2/3) 3

Common Readout: Hardware Interface Requirement Belle2link or equivalent (KLM, iTOP) Integrated into Belle II DAQ infrastructure 16-17 January 2013 Gary Varner, Belle II Directors Review (Pre CD-2/3) 4

iTOP Requirement: single photon timing Record single photon timing with MCP-PMT + system timing limited resolution σ ~ 38.4ps σ < 10ps 16-17 January 2013 Gary Varner, Belle II Directors Review (Pre CD-2/3) 5

iTOP Requirement: rate handling capability Deadtimeless operation at >1MHz single hit operation; 30kHz fast-feature extraction Use waveform samples to correct for intrinsic PMT cross-talk and charge-sharing CFD+ CAMAC ADC/TDC Waveform sampling σ ~ 38.4ps 16-17 January 2013 Gary Varner, Belle II Directors Review (Pre CD-2/3) 6

iTOP Trigger Requirements Few ns time resolution triggering X. Gao et al., IEEE (NSS/MIC) proceedings, 2010, pp 630-635. 90° 120° 40° e- e+ Single-track performance 2-4ns resolution desired for SVD timing match 16-17 January 2013 Gary Varner, Belle II Directors Review (Pre CD-2/3) 7

KLM scintillator: Trigger threshold and timing High efficiency triggering, sub ns-level timing Setting threshold at 7.5 pixels: SiPM noise  neutron bg rate even after 10 years of SiPM irradiation 16-17 January 2013 Gary Varner, Belle II Directors Review (Pre CD-2/3) 8

KLM scintillator : neutron degradation compensation Waveform sampling to maintain/understand gain and MPPC response after neutron damage 16-17 January 2013 Gary Varner, Belle II Directors Review (Pre CD-2/3) 9

iTOP Readout Component Counts 64 DAQ and 64 trigger fiber transceivers 32 FINESSE 8 COPPER 8k channels 1k 8-channel waveform ASICs 64 SRM Precision timing requires 64 channels of high-precision clock distribution (<~ 20ps) Approximately 30m runs 16-17 January 2013 Gary Varner, Belle II Directors Review (Pre CD-2/3) 10

iTOP readout chip status: design completed/reviewed, in fabrication IRS3/X ASIC IRS2 ASIC 50W term ~8mm Timing Generator Die Photograph 8 channels per chip @ 2.7-4 GSa/s Samples stored, 12-bit digitized in groups of 64 32k samples per channel (8us at 4GSa/s) IRS3C (April 2013) usable for Belle II Increased performance margin ASICs in fab: IRSX with high-speed serial interfaces IRS3D with enhanced dynamic range, same I/O 16-17 January 2013 Gary Varner, Belle II Directors Review (Pre CD-2/3) 11

iTOP Subdetector Readout Module Example IRS Boardstack IRS ASIC reads out 8 channels Require 2 ASICs to read out 16 PMT channels 4 x ASICs per self-contained carrier board (32 channels) 4 x ASIC carrier boards arranged in compact boardstack (128 channels) Combined readout electronics, mechanical support and cooling 4 boardstacks per quartz bar (512 channels) 16-17 January 2013 Gary Varner, Belle II Directors Review (Pre CD-2/3) 12

iTOP Readout Performance Measure time resolution in core distribution Trailing tail expected from photoelectron backscatter within PMT Also leading non-Gaussian tail due to small pulses Single p.e. timing Example 62ps measured time resolution Requirement: <100ps <= 50ps with higher gain Measured Time Resolution Vs Pulse Height Integrated Charge in MCP Laser Pulse Window 16-17 January 2013 Gary Varner, Belle II Directors Review (Pre CD-2/3) 13

KLM Readout: Component counts Scintillator Legacy RPCs 16 + 16 DAQ and Trigger fiber transceivers 20k channels 1.25k 16-channel Waveform sampling ASICs 144 SRM 16 FINESSE 4 COPPER 20k channels Discriminator + FPGA-based TDC 16 barrel, 16 Endcap (scint only) Data Concentrators Due to data sparseness, concentrate smaller number of fiber links Approximately 30m cable runs 16-17 January 2013 Gary Varner, Belle II Directors Review (Pre CD-2/3) 14

KLM Scintillator Readout Status h Ubias Al Depletion Region 2 m Substrate Pre-amps and TARGET ASIC Fabrication complete 16 channels 0.5-2.5 GSa/s 10-12-bit digitization Very similar to IRSx family (looser specs) TARGET6 (Dec. 2012) usable for Belle II TARGETX provides TARGET7 improvements (+ trigger bug fix) Noise is 500kHz − 2MHz not a problem: 5 p.e. threshold reduces rate to < 1kHz while maintaining ~ 99% MIP efficiency 16-17 January 2013 Gary Varner, Belle II Directors Review (Pre CD-2/3) 15

KLM scint Readout Final Form Factor Ribbon cables and HV distribution placed on separate RHIC board RHIC Board MPPC Signals Revised 10 Daughter Card Mother Board TARGET6 Daughter Card with Transformers TARGET6 daughter cards with transformers for common-mode noise reduction 16

KLM Readout Performance will be installed inside the detector were tested for radiation hardness at ITEP proton (200 MeV) beam. Photo-electron peaks obtained with irradiated amplifier Amplifiers gain and noise measured before (blue) and after (red) irradiation No effect was observed with radiation doses 5 times higher than expected at Belle II. 16-17 January 2013 Gary Varner, Belle II Directors Review (Pre CD-2/3) 17

KLM overall Readout: on-detector installation RPC Readout Scintillator Readout 16-17 January 2013 Gary Varner, Belle II Directors Review (Pre CD-2/3) 18

Outstanding Electronics R&D Finalize the production ASICs IRSX/IRS3D with IRS3C as back-up TARGETX with TARGET6 as back-up Back-up ASICs have less performance margin/functionality Finalize the production modules Final electro-mechanics prototypes exist (iTOP) Implement final FPGA choice (iTOP) Need to complete studies for kaon tagging and full B reconstruction Electrically Rev. 3 Readout works fine (KLM) Mechanics of cabling Full Data Concentrator/vertical slice test 16-17 January 2013 Gary Varner, Belle II Directors Review (Pre CD-2/3) 19

Gary Varner, Belle II Directors Review (Pre CD-2/3) Conclusion iTOP and KLM Readout mature Evidence – Performance achieved in beam and bench tests Final ASIC and readout electronics add performance margin and improved electro-mechanical robustness Costs are known and fit within funding profile Evidence – Costs defined by bid/vendor quote/similar work Fits funding profile Ready for CD-2 and (conditional) CD-3 pending success of recently submitted ASICs 16-17 January 2013 Gary Varner, Belle II Directors Review (Pre CD-2/3) 20