Arria 10 External Memory Interface Example Design Guidelines Quartus Prime Software v17.0

Introduction Intel’s EMIF IP has an optional synthesizable example design that can be generated to demonstrate a complete memory interface solution This design can be used by customers for initial interface validation This slide deck covers the following topics: EMIF IP generation Synthesizable example design generation For more information regarding the EMIF IP and parameterization, refer to the Implementing and Parameterizing IP section in the External Memory Interface Handbook *EMIF = External Memory Interface

Software Requirements Quartus Prime Software v17.0

Creating a Quartus Prime Project The following slides demonstrate how to create a Quartus Prime project Starting with Quartus Prime v17.0, users must create a Quartus Prime project before generating the EMIF IP and accompanying example design project Launch Quartus Prime and select New Project Wizard Or File > New Project Wizard Press Next, select a directory and name for the project, and select Next New Project Wizard

Creating a Quartus Prime Project Select Empty project and continue to press Next until you reach the Family, Device, and Board Settings option Select Arria 10 (GX/SX/GT) under Family and then select your specific Arria 10 device under Available devices You can filter the available devices list using the options on the right, including the Name filter Press Finish

Generating the EMIF IP The following slides demonstrate how to generate the EMIF IP and accompanying example design project Double-click Arria 10 External Memory Interfaces from the IP Catalog Or Tools > IP Catalog If the IP Catalog is not visible: View > Utility Windows > IP Catalog

Generating the EMIF IP Double-clicking on Arria 10 External Memory Interfaces opens the IP Parameter Editor Provide a File Name for the EMIF IP Click Create

Configuring the EMIF IP Under Memory Protocol, select the appropriate Protocol from the drop-down list Under the General tab, select the desired Speed Grade and Memory clock frequency Configure the EMIF IP by selecting appropriate settings under each tab For more information refer to the Implementing and Parameterizing IP section in the External Memory Interface Handbook

Memory Device and Development Kit Presets Note that there are predefined configurations available for various memory devices In the Presets window, select the desired memory device present and click Apply This will populate all the fields with vendor specific settings A custom memory device preset can also be created by clicking New and entering the configuration data There also exists presets for existing development kits in the Presets window, where you can select the appropriate one and click Apply

Generating the EMIF Example Design Project After configuring the EMIF IP, select the Example Designs tab and make sure the Synthesis checkbox is selected under Example Design Files Select Generate Example Design Or Generate > Generate Example Design

Generating the EMIF Example Design Project After selecting Generate Example Design, a pop-up window will appear asking you to provide a Path to store the example design Point to the desired location and select OK In this example, a new emif_0_example_design folder will be created in the existing emif_example directory (created in step 2, slide 4) This folder will contain all of the EMIF example design files

Generating the EMIF Example Design Project Upon successful example design generation, a dialog box will open with design completion detail; press Close Pin assignments are automatically generated when a development kit preset is selected If no development kit preset was selected, pin assignments need to be manually assigned

Saving the Configured EMIF IP After closing the window upon successful example design generation, click Finish in the IP Parameter Editor window A window will pop-up prompting you that recent changes have not been generated Select Yes if you want to save the IP for future reference/use, otherwise select No If you selected Yes, select Generate on the next window and then Finish once the generation has completed

EMIF Example Design Files After IP generation is complete, an example design directory will be created in the location selected during step 15, slide 11 Generated example design QSYS file Open this file to add/remove/modify IPs in the example design Generated external memory interface IP file Open this file to modify the EMIF IP Quartus Prime project file Open and compile this project with Quartus Prime software v17.0