Logic Gates and Logic Circuits Digital Systems Section 4 Logic Gates and Logic Circuits

NOR Gates Lecture Digital Systems credential: bring a computer die photo wafer : This can be an hidden slide. I just want to use this to do my own planning. I have rearranged Culler’s lecture slides slightly and add more slides. This covers everything he covers in his first lecture (and more) but may We will save the fun part, “ Levels of Organization,” at the end (so student can stay awake): I will show the internal stricture of the SS10/20. Notes to Patterson: You may want to edit the slides in your section or add extra slides to taylor your needs.

NAND Gates Lecture Digital Systems credential: bring a computer die photo wafer : This can be an hidden slide. I just want to use this to do my own planning. I have rearranged Culler’s lecture slides slightly and add more slides. This covers everything he covers in his first lecture (and more) but may We will save the fun part, “ Levels of Organization,” at the end (so student can stay awake): I will show the internal stricture of the SS10/20. Notes to Patterson: You may want to edit the slides in your section or add extra slides to taylor your needs.

Exercise: NOR and NAND Gates Lecture Digital Systems Exercise: NOR and NAND Gates Find the expression for the following circuit and create the corresponding truth table. D E G H F = (A+BC) + AB A B C D E G H F 1 AB 1 Proof that (A+BC) + AB = AB ? credential: bring a computer die photo wafer : This can be an hidden slide. I just want to use this to do my own planning. I have rearranged Culler’s lecture slides slightly and add more slides. This covers everything he covers in his first lecture (and more) but may We will save the fun part, “ Levels of Organization,” at the end (so student can stay awake): I will show the internal stricture of the SS10/20. Notes to Patterson: You may want to edit the slides in your section or add extra slides to taylor your needs.

IC Logic Gates 74XX Series Lecture Digital Systems IC Logic Gates 74XX Series 74LS00 74LS32 74LS08

Universality of NOR Gates Lecture Digital Systems Universality of NOR Gates It is possible to implement any logic expression using only NOR gates.

Universality of NAND Gates Lecture Digital Systems Universality of NAND Gates It is possible to implement any logic expression using only NAND gates.

Truth Table of Inverter Lecture Digital Systems Summary: Logic Gates Basic logic functions are realized in logic gates. Each logic gate has a symbol. The functionality of a basic logic function can be represented through a truth table. A truth table completely specifies the outputs of the basic logic function for all possible input combinations. Inverter Truth Table of Inverter A F Symbol of Inverter credential: bring a computer die photo wafer : This can be an hidden slide. I just want to use this to do my own planning. I have rearranged Culler’s lecture slides slightly and add more slides. This covers everything he covers in his first lecture (and more) but may We will save the fun part, “ Levels of Organization,” at the end (so student can stay awake): I will show the internal stricture of the SS10/20. Notes to Patterson: You may want to edit the slides in your section or add extra slides to taylor your needs. The logic operation of an inverter is: F = A’. As implied by its name, an input of 0 to this gate is inverted to 1, and an input of 1 to 0.

Summary: Logic Gates A F B AND Gate Lecture Digital Systems Summary: Logic Gates AND Gate Truth Table of AND Gate A B F Symbol of AND Gate credential: bring a computer die photo wafer : This can be an hidden slide· I just want to use this to do my own planning· I have rearranged Culler’s lecture slides slightly and add more slides· This covers everything he covers in his first lecture (and more) but may We will save the fun part, “ Levels of Organization,” at the end (so student can stay awake): I will show the internal stricture of the SS10/20· Notes to Patterson: You may want to edit the slides in your section or add extra slides to taylor your needs· The logic operation of an AND Gate is: F = A · B. If the two input signals are asserted (high), then the output will also be asserted (high). Otherwise, the output will be de-asserted (low).

Summary: Logic Gates A F B OR Gate Lecture Digital Systems Summary: Logic Gates OR Gate Truth Table of OR Gate A B F Symbol of OR Gate The logic operation of an OR Gate is: F = A + B. If either of the two input signals are asserted (high), or both of them are, then the output will also be asserted (high). Otherwise, the output will be de-asserted (low). Note that if there are n inputs to a gate, then the truth table of the gate will have 2n rows. credential: bring a computer die photo wafer : This can be an hidden slide· I just want to use this to do my own planning· I have rearranged Culler’s lecture slides slightly and add more slides· This covers everything he covers in his first lecture (and more) but may We will save the fun part, “ Levels of Organization,” at the end (so student can stay awake): I will show the internal stricture of the SS10/20· Notes to Patterson: You may want to edit the slides in your section or add extra slides to taylor your needs·

Truth Table of NAND Gate Lecture Digital Systems Summary: Logic Gates NAND Gate Truth Table of NAND Gate A B F Symbol of NAND Gate The logic operation of an NAND Gate is: F = (A · B)’. It is a combination of an AND Gate and an Inverter. credential: bring a computer die photo wafer : This can be an hidden slide· I just want to use this to do my own planning· I have rearranged Culler’s lecture slides slightly and add more slides· This covers everything he covers in his first lecture (and more) but may We will save the fun part, “ Levels of Organization,” at the end (so student can stay awake): I will show the internal stricture of the SS10/20· Notes to Patterson: You may want to edit the slides in your section or add extra slides to taylor your needs·

Summary: Logic Gates A F B NOR Gate Lecture Digital Systems Summary: Logic Gates NOR Gate Truth Table of NOR Gate A B F Symbol of NOR Gate The logic operation of an NOR Gate is: F = (A + B)’. It is a combination of an OR Gate and an Inverter. credential: bring a computer die photo wafer : This can be an hidden slide· I just want to use this to do my own planning· I have rearranged Culler’s lecture slides slightly and add more slides· This covers everything he covers in his first lecture (and more) but may We will save the fun part, “ Levels of Organization,” at the end (so student can stay awake): I will show the internal stricture of the SS10/20· Notes to Patterson: You may want to edit the slides in your section or add extra slides to taylor your needs·

Summary: Logic Gates A F B XOR Gate (Exclusive OR) Lecture Digital Systems Summary: Logic Gates XOR Gate (Exclusive OR) Truth Table of XOR Gate A B F Symbol of XOR Gate The logic operation of an XOR Gate is: F = A  B = A·B’ + A’·B A XOR Gate asserts its output only when both inputs differ (one is true, the other is false). credential: bring a computer die photo wafer : This can be an hidden slide· I just want to use this to do my own planning· I have rearranged Culler’s lecture slides slightly and add more slides· This covers everything he covers in his first lecture (and more) but may We will save the fun part, “ Levels of Organization,” at the end (so student can stay awake): I will show the internal stricture of the SS10/20· Notes to Patterson: You may want to edit the slides in your section or add extra slides to taylor your needs·

Summary: Logic Gates F XNOR Gate (Exclusive NOR) Lecture Digital Systems Summary: Logic Gates XNOR Gate (Exclusive NOR) Truth Table of XOR Gate F Symbol of XOR Gate The logic operation of an XOR Gate is: F = (A  B)’ = A·B + A’·B’ A XNOR Gate asserts its output only when both inputs are identical (whether both are true, or both are false). XNOR is the negation of XOR. credential: bring a computer die photo wafer : This can be an hidden slide· I just want to use this to do my own planning· I have rearranged Culler’s lecture slides slightly and add more slides· This covers everything he covers in his first lecture (and more) but may We will save the fun part, “ Levels of Organization,” at the end (so student can stay awake): I will show the internal stricture of the SS10/20· Notes to Patterson: You may want to edit the slides in your section or add extra slides to taylor your needs·

Digital Systems Section 5 Combinatorial Logic

Describing Circuit Functionality in Waveforms Lecture Digital Systems Describing Circuit Functionality in Waveforms Waveforms provide another approach in representing the functionality of a digital circuit. The value of each input signal is either high (1) or low (0), and for each combination, the output signal is defined. Waveforms for AND Gate, OR Gate, and Inverter

Logic Gates in Waveforms Lecture Digital Systems Logic Gates in Waveforms 1 time F x 1 x y F time NOT Gate OR Gate AND Gate

Lecture Digital Systems Example: Waveforms Given the following waveform, can you find the gate that connects input A, B, and C to the output OUT? OR Gate A credential: bring a computer die photo wafer : This can be an hidden slide· I just want to use this to do my own planning· I have rearranged Culler’s lecture slides slightly and add more slides· This covers everything he covers in his first lecture (and more) but may We will save the fun part, “ Levels of Organization,” at the end (so student can stay awake): I will show the internal stricture of the SS10/20· Notes to Patterson: You may want to edit the slides in your section or add extra slides to taylor your needs·

Example: Toll Booth Controller Lecture Digital Systems Example: Toll Booth Controller Consider the design of an automatic toll gate controller. The inputs are: payment card sensor (P) and car sensor (S). The outputs are: gate lift signal (L) and gate close signal (C). If a driver put the valid card near the sensor, the gate should raise. Afterwards, when the car has cleared the gate, it will close again. How to connect the inputs to the output? Logic Circuit Payment card? Car present? Lift gate Close gate credential: bring a computer die photo wafer : This can be an hidden slide. I just want to use this to do my own planning. I have rearranged Culler’s lecture slides slightly and add more slides. This covers everything he covers in his first lecture (and more) but may We will save the fun part, “ Levels of Organization,” at the end (so student can stay awake): I will show the internal stricture of the SS10/20. Notes to Patterson: You may want to edit the slides in your section or add extra slides to taylor your needs. L = P · S C = S’ A

Example: Automatic Lamp Switch Lecture Digital Systems Example: Automatic Lamp Switch An automatic lamp switch should turn on a lamp with a signal F if someone comes close to a door (motion sensor A is high) and the day is already dark (light sensor B is low). Design an expression to connect the inputs to the output. Draw the logic circuit. F = A · B’ A

Example: Seat Belt Warning Lecture Digital Systems Example: Seat Belt Warning For the design of circuit of seat belt warning light, sensor S = 1 if seat belt fastened, sensor K = 1 if car key is inserted, and sensor P = 1 if person is in seat. Warning light W should turn on if a person is in seat and the car key is inserted, but the seat belt is not yet fastened. Capture the Boolean equation and convert it to logic circuit. W = S’ · K · P A K P S W Seat Belt Warning

Example: Automatic Door Opener Lecture Digital Systems Example: Automatic Door Opener A door should be automatically open (F = 1) if a person is detected (P = 1), or a hold switch is pressed (H = 1) while there is no people detected (P = 0) . However, the door must be unlocked (C = 0) first using a force key before the door can operate. Design the logic equation and draw the logic circuit. F = H’·P·C’ + H·C’ = automatic + manual A F H C P Automatic Door Opener

Lecture Digital Systems Logic Design Process Step 1: Capture the function Create a truth table to describe the desired behavior of the system. Step 2: Create the logic expression For each output, an equation is assigned in the form of sum of minterms. If possible, the equations may be simplified. Step 3: Implement as a gate-based circuit For each output, a corresponding circuit is created. Sharing gates among multiple outputs is allowed.

Example: Boolean Function Lecture Digital Systems Example: Boolean Function Find the logic function of the following circuit. Write down its truth table. F = A · (B + C’) A B C C’ B+C’ F = A · (B+C’) 1

Circuit Representation Lecture Digital Systems Circuit Representation A F F = A’ Logic Circuit Boolean Function Truth Table Transition can be made among logic circuit, Boolean function / expression, and truth table.

Venn Diagram Representation Lecture Digital Systems Venn Diagram Representation Venn Diagram is a diagram representing mathematical or logical sets pictorially as circles or closed curves within an enclosing rectangle (the universal set). Common elements of the sets are represented by the areas of overlap among the circles.

Venn Diagram Representation Lecture Digital Systems Venn Diagram Representation

Venn Diagram Representation Lecture Digital Systems Venn Diagram Representation credential: bring a computer die photo wafer : This can be an hidden slide. I just want to use this to do my own planning. I have rearranged Culler’s lecture slides slightly and add more slides. This covers everything he covers in his first lecture (and more) but may We will save the fun part, “ Levels of Organization,” at the end (so student can stay awake): I will show the internal stricture of the SS10/20. Notes to Patterson: You may want to edit the slides in your section or add extra slides to taylor your needs.

Venn Diagram Representation Lecture Digital Systems Venn Diagram Representation credential: bring a computer die photo wafer : This can be an hidden slide. I just want to use this to do my own planning. I have rearranged Culler’s lecture slides slightly and add more slides. This covers everything he covers in his first lecture (and more) but may We will save the fun part, “ Levels of Organization,” at the end (so student can stay awake): I will show the internal stricture of the SS10/20. Notes to Patterson: You may want to edit the slides in your section or add extra slides to taylor your needs.

Venn Diagram Representation Lecture Digital Systems Venn Diagram Representation Constant 1 Constant 0 x x' Variable x Variable x’

Venn Diagram Representation Lecture Digital Systems Venn Diagram Representation x y x · y x + y x y z x · y’ x · y + z

Exercise with Venn Diagram Lecture Digital Systems Exercise with Venn Diagram Draw and give shade to the Venn diagram of: a) x·(y+z). b) x·y + x’y’z. x y z x y z

Exercise with Venn Diagram Lecture Digital Systems Exercise with Venn Diagram Express the shaded areas in terms of the variables A, B, and C. A B C A B C A B C B + A·C AB’C’ + A’BC (A+B)·C’

Exercise with Venn Diagram Lecture Digital Systems Exercise with Venn Diagram Verify xy + x’z + yz = xy + x’z by using Venn diagram. x y z x·y x y z x·y x y z x’·z y x z y·z x y z x’·z y z x x·y + x’·z + y·z y z x x·y + x’·z

Exercise with Venn Diagram Lecture Digital Systems Exercise with Venn Diagram Using Venn diagram, prove that (A + B)(A’ + B’) = AB’ + A’B. Using De Morgan’s theorem, find also the complement of (A + B)(A’ + B’).

Lecture Digital Systems Homework 3 (1/2) A house alarm (F) should sound if the alarm (A) is enabled and either the window is shaken (S) or the door is opened (D). Determine the Boolean equation F of this system. An expansion project (P) will be conducted if it is approved by the manager (G). If the project is not approved by the manager, the project can still be conducted if it is approved by either construction supervisor (C) only or maintenance supervisor (M) only. Determine the Boolean equation P of this system. See next slide.

Lecture Digital Systems Homework 3 (2/2) Determine the expression that defines the shaded area of the following Venn diagram. U W V Draw a 4-set Venn diagram and shade the area corresponding to the expression AB + ACD’. credential: bring a computer die photo wafer : This can be an hidden slide. I just want to use this to do my own planning. I have rearranged Culler’s lecture slides slightly and add more slides. This covers everything he covers in his first lecture (and more) but may We will save the fun part, “ Levels of Organization,” at the end (so student can stay awake): I will show the internal stricture of the SS10/20. Notes to Patterson: You may want to edit the slides in your section or add extra slides to taylor your needs. Please write your Class number after your Student ID. Deadline: 1 day before class. Monday, 25 September 2017 (Class 2). Tuesday, 26 September 2017 (Class 1).