Integrated Electronic Solutions for high precision / rad hard applications in accelerators Prof. Dr.-Ing. Klaus Hofmann TU Darmstadt Integrated Electronic Systems Lab Email: Klaus.Hofmann@ies.tu-darmstadt.de Phone: +49 6151 1620266 MHU (Multipurpose Hardware Unit) for Ring-RF control Precision high-speed clock phase adjustment Fully integrated high voltage generation and control 01.09.2017 | TU Darmstadt | Integrated Electronic Systems Lab | Klaus Hofmann | 1 14. Mai 2018 |
Special purpose HW for Ring-RF-signals Concept: Multi-Purpose Hardware for high precision signal derivation/acquisition. Various use-cases envisioned in SIS18/SIS100: Phase Advance Prediction (PAP) Phase Shift Module (PSM) Phase Correction Module (PCM) Optical Splitter and Adder (OSA) Beam-Spectrum Measurement (BSM) Beam-Simulator (BS) Optical Transmitter (OT) Bunch-Length Measurement (BLM) Bucket Filling Pattern (BFP) Optical Transmitter + BMMC (OTBMMC) BMMC + Optical Splitter and Adder (BMMCOSA) Multiplexer Bunch-by-Bunch Longitudinal Feedback System (MBBLFS) Maintenance and Diagnostics System (M&D) Optical Direct Link Transceiver (ODLT) 01.09.2017 | TU Darmstadt | Integrated Electronic Systems Lab | Klaus Hofmann | 2 14. Mai 2018 |
Prototyping and bringing the MHU into service Wide application scope of MHU: phase advance prediction, phase shifting, phase correction, beam simulation, deterministic bunch-to-bucket filling, ....... , bunch length measurement, optical transmission. Status: concept worked out, detailed implementation has to follow. Previous page: red tasks „finished“ until E/2017 Missing: implementation of „yellow“ parts, interfacing, software/algorithms, bringing into service … 01.09.2017 | TU Darmstadt | Integrated Electronic Systems Lab | Klaus Hofmann | 2 14. Mai 2018 |
Precision high-speed clock phase adjustment Outcome of a soon-to-be-ended DFG project: Mixed-signal ASIC for clock adjustment Clock sync. / Precise phase generation Key properties Clock signals in the GHz range More than 6 bit phase resolution (~ 2.5fs) Targetted for ASICs: can be made rad-hard Phase-to-Digital Converter (PDC) Scalable all-digital architecture High-resolution (limited only by jitter) Robust (no calibration needed) Proposal: Adaption/extension to accelerator requirements Possible in rad-hard implementation (all digital, SOI-ASIC, redundancy concepts possible) 01.09.2017 | TU Darmstadt | Integrated Electronic Systems Lab | Klaus Hofmann | 2 14. Mai 2018 |
High-Voltage Generation and Application in ASICs Novel trend in Integrated Electronics: fully integratable high voltage elements (transistors/capacitors) + „classical“ analog/digital transistors High-Voltage := 700 V, silicon area of this transistor only 0,25µm2 „Classical“ electronics on same chip for precision control Actual use cases Applications which require multiple (miniaturized) complex high voltage waveforms E.g. pulse-width modulated, low power signals for sensors, antennas, ultra-sonic applications, electro-active polymers Research directions Stacking of transistors to even higher voltages (1200V / 1500V) Combination with stacked MEMS for contacting „environment“ Of any use for accelerator community? 01.09.2017 | TU Darmstadt | Integrated Electronic Systems Lab | Klaus Hofmann | 2 14. Mai 2018 |