Instruction set Architecture

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Presentation transcript:

Instruction set Architecture DEPARTMENT OF COMPUTER SCIENCE & TECHNOLOGY FACULTY OF SCIENCE & TECHNOLOGY UNIVERSITY OF UWA WELLASSA 1 1

Introduction The instruction set of a microprocessor is a list of all the software instructions that the processor can execute. When an instruction expressed in machine code, it is encoding using 0’s and 1’s(in hexadecimal format) A single machine instruction can take anywhere from 1 to 6 byte code. 2 2 2

Instruction Format Format of a typical microprocessor instruction E.g. MOV AX,BX ADD AX,BX Op-code are usually written in the form called mnemonic. E.g. MOVE MOV ADDITION ADD INCREASE INC Op-code Operands Identifies the action to be taken Identifies the data to be operated 3 3 3

Instruction Format An instruction may have 0-3 number of operands E.g. No of operands Instruction Meaning HLT Halt the processor 1 INC AX Add 1 to the value of register AX 2 MOV AX,BX Copy the value of BX to AX 3 SHLD DX,AX,4 Shift register AX 4 bits left into DX 4 4 4

Classes of 8086 instruction set Data movement MOV,PUSH,POP Conversion CBW,CWD Arithmetic ADD,SUB,MUL,DIV,CMP Logical,shift,rotate and bit instructions AND,OR,SHL,SHR,RCL,RCR Input/output instructions IN,OUT String instructions MOVS ,STOS,LODS Program flow control JMP,CALL,RET,Conditional JUMP Miscellaneous STC,CMC 5 5 5

Addressing modes of 8086 Addressing mode refers to valid form of the operand or operands of an instruction. The operands can be registers, memory locations(memory variables) or constant values. There are 3 types of addressing modes Register addressing mode Immediate addressing mode Memory Addressing mode 6 6 6

Register Addressing mode For an instruction if all the operands are internal registers of 8086 microprocessor then it is in register addressing mode. E.g. ADD AX,BX MOV AX,BX INC AX Not all register conditions are valid addressing mode. There are some conditions. Conditions The size of the operands should match. Byte registers AL,BL,CL,DL,AH,BH,….(8 bits) Word registers AX,BX,CX,DX….(16 bits) 7 7 7

Register Addressing mode… ADD AL,BL ADD AX,BL ADD AX,BX ADD AL,BX Valid Invalid Valid Invalid Both operands cannot be in segment registers e.g. MOV DS,CS If you need to move the value stored in CS register to DS register have to use data registers in between. MOV AX,CS MOV DS,AX 8 8 8

Immediate Addressing mode MOV AX,100 Source is a constant value. It is a part of this instruction. Not stored in a register or memory location. So operand is called as an immediate operand. To accesses immediate operand immediate addressing mode is used. e.g. MOV AX,100 MOV a,100 where a is a byte in memory The source value is immediately available in ALU and the processor does not need to access any other register or a memory location to fetch the data Therefore the operation will perform much faster 9 9 9

Immediate Addressing mode… Conditions The size of two operands should be match. Byte register can store only 0-255. MOV AL,300 MOV AX,300 We can define a constant and then use it as source operand. This is also an immediate addressing mode. But the size of defined constant and the destination register or memory location should be matched. e.g. c EQU 20 MOV AL,c Invalid Valid 10 10 10

Immediate Addressing mode… When defining a memory variable a db 100 a dw 1000 a dd 100000 11 11 11

Memory Addressing mode If a memory location is used for an operand then it is in memory addressing mode. There are 5 types of memory addressing modes. Direct memory addressing mode Register indirect memory addressing mode Based memory addressing mode Indexed memory addressing mode Based Indexed addressing mode 12 12 12

Memory Addressing mode… Direct memory addressing mode one operand is refers to a memory location directly and other operand refers to a register e.g. a db 10 a allocate a 1 byte MOV AL,a ADD AL,a SUB AL,a All these instructions are directly accessing the memory location(without using register) Size of memory location and size of registers must match. 10 13 13 13

Memory Addressing mode… Example Suppose we define a double word memory variable with the value 169,772,160(=0A1E8480H) a dd 169772160 a (refers to the 1st byte) Highest addressed word Lowest addressed word 0A 80 1E 84 14 14 14

Memory Addressing mode… MOV AL,a AL=80H(AL store only the lowest byte of a) MOV AX, a AX=8480H(AX store only the lowest word of a) If value <=255; Store in a byte register(8 bit) value <=65535; Store in a word register(16 bit) value>65535 Store in 2 word register(32 bit) previous double word can be store as two words store as four bytes in registers 15 15 15

Memory Addressing mode… Register indirect memory addressing mode offset is placed in a register and then use that register to access the item pointed by the register Registers used BX SI with data segment DI BP - with stack segment In order to obtain the offset of a variable OFFSET operator is used. To access data stored in that memory location [] operator is used. 16 16 16

Memory Addressing mode… Examples a db 100 MOV BX,OFFSET a MOV AL,[BX] AL=100 Physical Address =DS:BX Use this method to access a memory location of an array or character string DS 100 1 byte a offset 17 17 17

Memory Addressing mode… ARR db 1,2,3,4,5 MOV BX,OFFSET ARR MOV CX,5 NEXT: MOV AL,[BX] INC BX LOOP NEXT DS 2 1 4 3 Offset ARR 18 18 18

Memory Addressing mode… Base memory addressing mode This is similar to register indirect memory addressing mode, except that the displacement can be added to the register value, forming the offset to be used as the memory address. e.g. MOV BX,OFFSET ARR MOV AL,[BX+3] AL=4 DS 2 1 4 3 Offset Displacement ARR 19 19 19

Memory Addressing mode… The displacement can be specified MOV AX,[reg+disp] MOV AX,[reg][disp] MOV AX,disp[reg] MOV AX,[reg]+disp Example ARR db 1,2,3,4,5 MOV BX,OFFSET ARR MOV AL,[BX+2] MOV AL,[BX][2] MOV AL,2[BX] MOV AL,[BX]+2 20 20 20

Memory Addressing mode… Index memory addressing mode Index addressing works in a similar manner to base addressing except the displacement is placed in a register and the offset of the data structure specified in the name itself. SI and DI registers are typically used for the displacement although BX and BP can be used DS 2 1 4 3 Offset e.g. ARR db 1,2,3,4,5 MOV SI,3 MOV AL,ARR[SI] MOV AL,ARR[SI+1] Displacement ARR 21 21 21

Memory Addressing mode… Calculate the sum of two byte arrays ARR1 db 1,2,3,4,5 ARR2 db 2,4,6,8,10 MOV SI,0 MOV CX,5 NEXT:MOV AL,ARR1[SI] ADD ARR2[SI],AL INC SI LOOP NEXT 22 22 22

Memory Addressing mode… Base Index memory addressing mode This addressing mode is a combination of both base and index addressing modes. Here both offset and displacement are store in registers offset=BX/BI displacement=SI/DI Either BX or BP in combination with SI or DI is used. neither BX and BP nor SI and DI can be used together MOV DI,OFFSET ARR MOV SI,7 MOV BX,OFFSET ARR MOV BP,5 Invalid Invalid 23 23 23

Memory Addressing mode… e.g. ARR db 1,2,3,4,5 MOV BX,OFFSET ARR MOV SI,3 MOV AL,[BX+SI] MOV AL,[BX][SI] MOV AL,[BX]+[SI] MOV AL,[SI][BX] 24 24 24

Stack Segment The stack segment is a special area of memory designed for quick temporary storage of program data and the subroutine return addresses. It is a LIFO (Last In First Out) memory. SP Register – Points to the top of the stack. Contains the offset of next memory location to be access in the stack segment.   SS Register – Points to the base of the stack. BP Register – Contains the offset from the base any other memory location in stack segment. BP Register SP Register SS Register 25 25 25

PUSH and POP instructions In Assembly programming data is push on to the stack by the PUSH instruction and data is pop out from the stack by POP instruction. Operands must be 16 bit registers. PUSH <Operand> Operands must be 16 bit registers POP <Operand> In the stack segment the data define type should be in word type and therefore the operands must be 16 bit registers. 26 26 26

PUSH and POP instructions… Example – MOV AX, 100   PUSH AX POP AX 00 AH 64 AL AH AL AH comes first SP Register AH AL AL comes first SP Register 27 27 27

PUSH and POP instructions… In Assembly programming we should allocate memory space to stack segment. db 100 dup(?) ; Allocate 100 bytes for the stack segment Example MOV AX, 100 PUSH AX MOV BX, 200 PUSH BX MOV CX, 300 PUSH CX POP CX POP BX After each PUSH and POP instruction show the content of the stack segment 28 28 28

PUSH and POP instructions… MOV AX, 100 PUSH AX   MOV BX, 200 PUSH BX AH AL SP Register AH AL BH BL SP Register 29 29 29

PUSH and POP instructions… MOV CX, 300 PUSH CX   POP CX AH AL BH BL CH CL SP Register AH AL BH BL CH CL SP Register 30 30 30

PUSH and POP instructions… POP BX   AH AL BH BL SP Register 31 31 31

Use of stack segment Can use as a stack data structure We can use stack segment as a normal stack when we want to perform some operations using a stack data structure. When interrupt is requested before transferring the control to the ISR (Interrupt Service Routine), the processor save the current program addresses and data on to the stack (using PUSH operation). When the ISR finishes its execution by using IRET instruction processor will pop the current program data. (Original values) 32 32 32

Use of stack segment… In Assembly language program, before ‘INT21H’ instruction we have different values in registers (SS, CS, DS and AX). When we execute ‘INT21H’ instruction what will happen is, it delete all the contents in these registers and use them to perform operations within the ‘INT21H’. Suppose we have to execute the ‘INT21H’ instruction in the middle of our program. Then already kept data and instructions in SS, CS, DS and AX registers should be saved. In a situation like this the processor uses stack segment. Processors push these values into stack segment and then free the registers. After performing the operations within ‘INT21H’, the original data should keep in the current registers. Processor use IRET instruction to do this. 33 33 33